S6C0671 Datasheet, PDF (26/29 Pages) Samsung semiconductor – 8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER

S6C0671
8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER
DC CHARACTERISTICS
Table 5. DC Characteristics (Ta = -20 to 75 °C, VDD1 = 2.7 to 3.6 V, VDD2 = 8 to 15 V, VSS1 = VSS2 = 0 V)
Parameter
High level input voltage
Low level input voltage
Input leakage current
High level output
voltage
Low level output voltage
Resistor
Driver output current
Output voltage deviation
Output RMS voltage
deviation
Output voltage range
Logic part dynamic
current
Driver part dynamic
current
Symbol
VIH
VIL
IL
VOH
VOL
R0 -
R254
IVOH
IVOL
∆VO
dVrms⁽²⁾
Vyo
IDD1
IDD2
Condition
SHL, CLK2, D00 - D57, CLK1,
DATPOL1, DATPOL2, POL,
DIO1 (DIO2)
DIO1 (DIO2), IO = -1.0 mA
DIO1 (DIO2), IO = +1.0 mA
Refer to Table 1. Resistor
Strings
VDD2 = 10.0 V,
Vx = 3.5 V, Vyo = 9.5 V⁽¹⁾
VDD2 = 10.0 V,
Vx = 6.5 V, Vyo = 0.5 V⁽¹⁾
VSS2 + 0.1 V to VDD2 - 1.5 V
VDD2 - 1.5 V to VDD2 - 0.1 V
Input data: 00H to FFH
Input data: 00H to FFH
VDD1 = 3.0 V ⁽³⁾
VDD2 = 10 V ⁽⁴⁾
Min.
0.8 VDD1
0
-1
VDD1 - 0.5
-
Rn × 0.7
-
1.0
-
-
-
VSS2 +
0.1
-
-
Typ.
-
-
-
-
-
-2.0
2.0
±7
±10
±3
-
4.0
10.0
Max. Unit
VDD1
0.2 VDD1
V
1
µA
-
V
0.5
Rn × 1.3 Ω
-1.0
mA
-
mA
±15
±20
mV
±10
VDD2 –
0.1
V
7.0
mA
15.0
NOTES:
1. Vyo is the output voltage of analog output pins Y1 to Y384.
Vx is the voltage applied to analog output pins Y1 to Y384.
2. dVrms is a maximum deviation value from ideal difference between high output and low output at the same gray scale.
3. CLK1 period is defined to be 15.6 µs at fCLK2 = 54 MHz, data pattern = 10101010
(checkerboard pattern), Ta = 25 °C.
4, Yout Load Condition
YOUT
2kΩ
4kΩ
4kΩ
VCOM = 0.5 VDD2
20pF
2kΩ
4kΩ
Figure 5. Yout Load Condition
40pF
4kΩ
20pF
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