K8A56ETC Datasheet, PDF (8/64 Pages) Samsung semiconductor – 256Mb C-die NOR FLASH

K8A56(57)15ET(B)(Z)C
Rev. 1.0
datasheet ^{NOR FLASH MEMORY}
6.0 ORDERING INFORMATION
K8 A 56 15 E T C - S E 1E
Samsung
NOR Flash Memory
Access Time
1E : Refer to Table 1
Device Type
A : De-Multiplexed Burst
Density(*Note)
54 : 256Mbits for 66/83MHz(Sync MRS)
55 : 256Mbits for 108/133MHz(Sync MRS)
56 : 256Mbits for 66/83MHz(No option)
57 : 256Mbits for 108/133MHz(No option)
Organization
15 : x16 Organization
Operating Voltage Range
E : 1.7 V to 1.95V
NOTE :
Density : (1) 54 : 256Mb for 66/83Mhz with the Sync MRS option
(2) 55 : 256Mb for 108/133Mhz with the Sync MRS option
(3) 56 : 256Mb for 66/83Mhz with no option
(4) 57 : 256Mb for 108/133Mhz with no option
Operating Temperature Range
C : Commercial Temp. (0 °C to 70 °C)
E : Extended Temp. (-25 °C to 85 °C)
Package
F : FBGA D : FBGA(Lead Free)
S : FBGA(Lead Free, OSP)
Version
C : 4th Generation
Block Architecture
T : Top Boot Block, B : Bottom Boot Block
Z : Uniform Block
[Table 1] PRODUCT LINE-UP
Mode
VCC=1.7V
-1.95V
Synchronous/
Burst
Asynchronous
K8A(56/57)15E
Speed Option
Max. Initial Access Time (tIAA, ns)
Max. Burst Access Time (tBA, ns)
Max. Access Time (tAA, ns)
Max. CE Access Time (tCE, ns)
Max. OE Access Time (tOE, ns)
1C
(66MHz)
95
11
100
100
15
1D
(83MHz)
95
9
100
100
15
1E
(108MHz)
95
7
100
100
15
1F
(133MHz)
95
6
100
100
15
[Table 2] PRODUCT Classification
Speed/Boot Option
256Mb for 66/83MHz
256Mb for 108/133MHz
Top
K8A5615ETC
K8A5715ETC
Bottom
K8A5615EBC
K8A5715EBC
Uniform
K8A5615EZC
K8A5715EZC
[Table 3] K8A(56/57)15E DEVICE BANK DIVISIONS
Mbit
256Mbit (Boot block part)
256Mbit (Uniform block part)
Bank 0 ~ Bank 15
Block Sizes
Four 16Kword blocks and two hundred fifty-five 64Kword blocks
Two hundred fifty-six 64Kword blocks
-8-