K4S560432E-UC Datasheet, PDF (8/14 Pages) Samsung semiconductor – 256Mb E-die SDRAM Specification 54 TSOP-II with Pb-Free (RoHS compliant)

SDRAM 256Mb E-die (x4, x8, x16)
DC CHARACTERISTICS (x4, x8)
(Recommended operating condition unless otherwise noted, TA = 0 to 70°C)
Parameter
Symbol
Test Condition
Operating current
(One bank active)
Precharge standby current in
power-down mode
Precharge standby current in
non power-down mode
Active standby current in
power-down mode
Active standby current in
non power-down mode
(One bank active)
Operating current
(Burst mode)
Burst length = 1
ICC1 tRC ≥ tRC(min)
IO = 0 mA
ICC2P CKE ≤ VIL(max), tCC = 10ns
ICC2PS CKE & CLK ≤ VIL(max), tCC = ∞
ICC2N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
ICC2NS
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
ICC3P CKE ≤ VIL(max), tCC = 10ns
ICC3PS CKE & CLK ≤ VIL(max), tCC = ∞
ICC3N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
ICC3NS
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
IO = 0 mA
Page burst
ICC4 _{4banks Activated.}
tCCD = 2CLKs
Refresh current
ICC5 tRC ≥ tRC(min)
C
Self refresh current
ICC6 CKE ≤ 0.2V
L
Notes : 1. Measured with outputs open.
2. Refresh period is 64ms.
3. K4S5604(08)32E-UC
4. K4S5604(08)32E-UL
5. Unless otherwise noticed, input swing level is CMOS(VIH/VIL=VDDQ/VSSQ).
CMOS SDRAM
Version
75
80
2
2
20
10
6
6
25
25
100
180
3
1.5
Unit Note
mA
1
mA
mA
mA
mA
mA
mA
1
mA
2
mA
3
mA
4
Rev. 1.3 August 2004