K4M28163LF Datasheet, PDF (8/12 Pages) Samsung semiconductor – 2M x 16Bit x 4 Banks Mobile SDRAM in 54FBGA

K4M28163LF - R(B)E/N/S/C/L/R
Mobile-SDRAM
AC CHARACTERISTICS(AC operating conditions unless otherwise noted)
Parameter
Symbol
-75
Min Max
-1H
Min Max
CLK cycle time
CAS latency=3
tCC
7.5
9.5
CLK cycle time
CAS latency=2
tCC
9.5 1000 9.5 1000
CLK cycle time
CAS latency=1
tCC
-
-
CLK to valid output delay
CAS latency=3
tSAC
5.4
7
CLK to valid output delay
CAS latency=2
tSAC
7
7
CLK to valid output delay
CAS latency=1
tSAC
-
-
Output data hold time
CAS latency=3
tOH
2.5
2.5
Output data hold time
CAS latency=2
tOH
2.5
2.5
Output data hold time
CAS latency=1
tOH
-
-
CLK high pulse width
tCH
2.5
3.0
CLK low pulse width
tCL
2.5
3.0
Input setup time
tSS
2.0
2.5
Input hold time
tSH
1.0
1.5
CLK to output in Low-Z
tSLZ
1
1
CAS latency=3
5.4
7
CLK to output in Hi-Z
CAS latency=2
tSHZ
7
7
CAS latency=1
-
-
NOTES :
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
-1L
Min Max
9.5
12 1000
25
7
8
20
2.5
2.5
2.5
3.0
3.0
2.5
1.5
1
7
8
20
Unit Note
ns
1
ns 1,2
ns
2
ns
3
ns
3
ns
3
ns
3
ns
2
ns
8
February 2004