K8P5616UZB Datasheet, PDF (50/60 Pages) Samsung semiconductor – 256Mb B-die Page NOR FLASH

K8P5616UZB
Rev. 1.0
datasheet NOR FLASH MEMORY
SWITCHING WAVEFORMS
Toggle Bit During Internal Routine Operation
tAHT
tAS
Address*
tAA
tAHT
CE
tOEH2
tCEPH
WE
OE
DQ6/DQ2
tDH
Data In
tASO
tOEPH
Status
Data
tOE
Status
Data
Status
Data
Array Data Out
RY/BY
NOTE :
A = Valid Address ; Not required for DQ6. The switching waveform shows first two status cycle after command sequence, last status read cycle, and array data read cycle CE
does not need to go high between status bit reads.
Address for the write operation must include a bank address (A21~A23) where the data is written.
WE
DQ6
Enter
Embedded
Erasing
Erase
Suspend
Enter Erase
Suspend Program
Erase
Erase Suspend
Read
Erase
Suspend
Program
Erase
Resume
Erase Suspend
Read
Erase
DQ2
Toggle
DQ2 and DQ6
with OE or CE
NOTE : DQ2 is read from the erase-suspended block.
Figure 21: Toggle Bit During Internal Routine Operation Timings
Erase
Complete
- 50 -