K8S6415ETB Datasheet, PDF (37/39 Pages) Samsung semiconductor – 64M Bit (4M x16) Muxed Burst , Multi Bank NOR Flash Memory

K8S6415ET(B)B
FLASH MEMORY
Case2 : Start from "4N+1" address group
5 cycle for initial access shown.(66MHz case)
Programmable wait state function is set to 01h (Wait States 3)
Address/
Data Bus
Valid Address
3D
3E
3F
40
41
42
43
CLK
3D
AVD
3E
3F
40
41
42
43
44
Additional 1 Cycle for First Word Boundary
CE
tCEZ
OE
tOER
tOEZ
RDY
Case 3 : Start from "4N+2" address group
5 cycle for initial access shown.(66MHz case)
Programmable wait state function is set to 01h (Wait States 3)
Address/
Data Bus
Valid Address
3E
3F
40
41
42
43
CLK
3E
AVD
3F
40
41
42
43
44
Additional 2 Cycle for First Word Boundary
CE
tCEZ
OE
tOER
tOEZ
RDY
Notes:
1. Address boundry occurs every 16 words beginning at address 00003FH , 00007FH , 0000BFH , etc.
2. Address 000000H is also a boundry crossing.
3. No additional clock cycles are needed except for 1st boundary crossing.
Figure 18. FLASH Crossing of first word boundary in burst read mode.
37
Revision 1.1
January, 2006