K8S6415ETB Datasheet, PDF (2/39 Pages) Samsung semiconductor – 64M Bit (4M x16) Muxed Burst , Multi Bank NOR Flash Memory

K8S6415ET(B)B
FLASH MEMORY
64M Bit (4M x16) Muxed Burst , Multi Bank NOR Flash Memory
FEATURES
GENERAL DESCRIPTION
• Single Voltage, 1.7V to 1.95V for Read and Write operations
• Organization
- 4,194,304 x 16 bit ( Word Mode Only)
• Multiplexed Data and Address for reduction of interconnections
- A/DQ0 ~ A/DQ15
• Read While Program/Erase Operation
• Multiple Bank Architecture
- 16 Banks (4Mb Partition)
• OTP Block : Extra 256Byte block
• Read Access Time (@ CL=30pF)
- Asynchronous Random Access Time :
90ns (54MHz) / 80ns (66MHz)
- Synchronous Random Access Time :
88.5ns (54MHz) / 70ns (66MHz)
- Burst Access Time :
14.5ns (54MHz) / 11ns (66MHz)
• Burst Length :
- Continuous Linear Burst
- Linear Burst : 8-word & 16-word with No-wrap & Wrap
• Block Architecture
- Eight 4Kword blocks and one hundreds twenty seven
32Kword blocks
The K8S6415E featuring single 1.8V power supply is a 64Mbit
Muxed Burst Multi Bank Flash Memory organized as 4Mbx16.
The memory architecture of the device is designed to divide its
memory arrays into 135 blocks with independent hardware pro-
tection. This block architecture provides highly flexible erase
and program capability. The K8S6415E NOR Flash consists of
sixteen banks. This device is capable of reading data from one
bank while programming or erasing in the other bank.
Regarding read access time, the K8S6415E provides an 14.5ns
burst access time and an 90ns initial access time at 54MHz. At
66MHz, the K8S6415E provides an 11ns burst access time and
70ns initial access time. The device performs a program opera-
tion in units of Single 16 bits (word) and an erase operation in
units of a block. Single or multiple blocks can be erased. The
block erase operation is completed within typically 0.7 sec. The
device requires 15mA as program/erase current in the
extended temperature ranges.
The K8S6415E NOR Flash Memory is created by using Sam-
sung's advanced CMOS process technology. This device is
available in 44 ball FBGA package.
- Bank 0 contains eight 4 Kword blocks and seven 32Kword
blocks
- Bank 1 ~ Bank 15 contain one hundred twenty 32Kword blocks
• Reduce program time using the VPP
PIN DESCRIPTION
• Support Single & Quad word accelerate program
• Power Consumption (Typical value, CL=30pF)
- Burst Access Current : 30mA
- Program/Erase Current : 15mA
- Read While Program/Erase Current : 40mA
- Standby Mode/Auto Sleep Mode : 15uA
• Block Protection/Unprotection
- Using the software command sequence
- Last two boot blocks are protected by WP=VIL
- All blocks are protected by VPP=VIL
• Handshaking Feature
- Provides host system with minimum latency by monitoring
RDY
• Erase Suspend/Resume
• Program Suspend/Resume
• Unlock Bypass Program/Erase
• Hardware Reset (RESET)
• Data Polling and Toggle Bits
- Provides a software method of detecting the status of program
or erase completion
• Endurance
100K Program/Erase Cycles Minimum
• Data Retention : 10 years
• Extended Temperature : -25°C ~ 85°C
• Support Common Flash Memory Interface
• Low Vcc Write Inhibit
• Package : 44 - ball FBGA Type, 7.5x8.5mm
0.5 mm ball pitch
1.0 mm (Max.) Thickness
Pin Name
Pin Function
A16 - A21 Address Inputs
A/DQ0 - A/DQ15 Multiplexed Address/Data input/output
CE
Chip Enable
OE
Output Enable
RESET
Hardware Reset Pin
VPP
Accelerates Programming
WE
Write Enable
WP
Hardware Write Protection Input
CLK
Clock
RDY
Ready Output
AVD
Address Valid Input
Vcc
Power Supply
VSS
Ground
SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice.
2
Revision 1.1
January, 2006