S6A0074 Datasheet, PDF (33/68 Pages) Samsung semiconductor – 34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD

34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A0074
Instruction RE
Table 10. Instruction Set 2 (Continued)
Instruction Code
Description
Executi
on Time
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
(fosc =
270kHz)
Scroll
Enable
1 0 0 0 0 0 1 HS4 HS3 HS2 HS1 Determine the line for horizontal
smooth scroll.
HS1 = "1/0": 1st line dot scroll
enable/disable
HS2 = "1/0": 2nd line dot scroll
enable/disable
HS3 = "1/0": 3rd line dot scroll
enable/disable
HS4 = "1/0": 4th line dot scroll
enable/disable
39µs
Function
Set
0 0 0 ^{0 0 1 DL N RE X X} Set interface data length
(0)
DL = "1": 8-bit,
39µs
DL = "0": 4-bit numbers of display
line when NW = "0",
N = "1": 2-line,
N = "0": 1-line extension register,
RE("0"),
1 0 00 ⁰
1 DL N RE BE 0 Set DL, N, RE("1") and
(1)
CGRAM/SEGRAM blink enable
(BE)
BE = "1/0": CGRAM/SEGRAM
blink enable/disable
39µs
Set
CGRAM
address
0 0 0 ^{0 1 AC5 AC4 AC3 AC2 AC1 AC0} Set CGRAM address in address
counter.
39µs
Set
1 0 0 ^{0 1 X X AC3 AC2 AC1 AC0} Set SEGRAM address in address
SEGRAM
counter.
address
39µs
Set
DDRAM
address
0 0 0 ^{1 AC6 AC5 AC4 AC3 AC2 AC1 AC0} Set DDRAM address in address
counter.
39µs
Set scroll 1 0 0 ^{1 X SQ5 SQ4 SQ3 SQ2 SQ1 SQ0} Set the quantity of horizontal dot
quantity
scroll.
39µs
Read busy X 0 1 ^{BF AC6 AC5 AC4 AC3 AC2 AC1 AC0} Can be known whether during
0µs
flag and
internal operation or not by
address
reading BF. The contents of
address counter can also be read.
BF = "1": busy state,
BF = "0": ready state.
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