S6A0074 Datasheet, PDF (21/68 Pages) Samsung semiconductor – 34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD

34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A0074
INSTRUCTION DESCRIPTION
OUTLINE
To overcome the speed difference between internal clock of S6A0074 and MPU clock, S6A0074 performs
internal operation by storing control information to IR or DR. The internal operation is determined according to the
signal from MPU, composed of read/write and data bus. (refer to Table 6/10)
Instruction can be divided largely four kinds;
• S6A0074 function set instructions (set display methods, set data length, etc.)
• Address set instructions to internal RAM
• Data transfer instructions with internal RAM
• Others
The address of internal RAM is automatically increased or decreased by 1.
When IE = "High", S6A0074 is operated according to Instruction Set 1(Table 6) and
when IE = "Low", S6A0074 is operated according to Instruction Set 2 (Table 10).
NOTE:
During internal operation, Busy Flag (DB7) is read high. Busy Flag check must be proceeded the next instruction.
Busy flag check must be proceeded the next instruction.
When an MPU program with Busy Flag (DB7) checking is made, 1/2 Fosc (is necessary) for executing the next
instruction by the falling edge of the “E” signal after the Busy Flag (DB7) goes to “Low”.
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