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K4S643232E-TI Datasheet, PDF (3/12 Pages) Samsung semiconductor – 2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL | |||
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K4S643232E-TI/P
CMOS SDRAM
512K x 32Bit x 4 Banks Synchronous DRAM
FEATURES
⢠3.3V power supply
⢠LVTTL compatible with multiplexed address
⢠Four banks operation
⢠MRS cycle with address key programs
-. CAS latency (2 & 3)
-. Burst length (1, 2, 4, 8 & Full page)
-. Burst type (Sequential & Interleave)
⢠All inputs are sampled at the positive going edge of the system
clock
⢠Burst read single-bit write operation
⢠DQM for masking
⢠Auto & self refresh
⢠15.6us refresh duty cycle(4K/64ms)
⢠Industrial Temperature range : -45oC to +85oC
GENERAL DESCRIPTION
The K4S643232E is 67,108,864 bits synchronous high data
rate Dynamic RAM organized as 4 x 524,288 words by 32 bits,
fabricated with SAMSUNGâ²s high performance CMOS technol-
ogy. Synchronous design allows precise cycle control with the
use of system clock. I/O transactions are possible on every
clock cycle. Range of operating frequencies, programmable
burst length and programmable latencies allow the same device
to be useful for a variety of high bandwidth, high performance
memory system applications.
ORDERING INFORMATION
Part NO.
Max Freq.
K4S643232E-TI/P60
166MHz
K4S643232E-TI/P70
143MHz
Interface Package
LVTTL
86
TSOP(II)
⢠- I/P : Industrial temperature (-45oC to +85oC)
FUNCTIONAL BLOCK DIAGRAM
Data Input Register
Bank Select
CLK
ADD
LCKE
LRAS LCBR
LWE
LCAS
512K x 32
512K x 32
512K x 32
512K x 32
Column Decoder
Latency & Burst Length
Programming Register
LWCBR
Timing Register
LWE
LDQM
DQi
LDQM
CLK
CKE
CS
RAS
CAS
WE
DQM
* Samsung Electronics reserves the right to
change products or specification without
notice.
Rev. 1.2 (Oct. 2001)
-3-
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