K3P7V1000 Datasheet, PDF (3/4 Pages) Samsung semiconductor – 64M-Bit (8Mx8 /4Mx16) CMOS MASK ROM

K3P7V(U)1000B-YC
MODE SELECTION
CE
OE
BHE
H
X
X
L
H
X
H
L
L
L
CMOS MASK ROM
Q15/A-1
X
X
Output
Input
Mode
Standby
Operating
Operating
Operating
Data
High-Z
High-Z
Q0~Q15 : Dout
Q0~Q7 : Dout
Q8~Q14 : Hi-Z
Power
Standby
Active
Active
Active
CAPACITANCE(TA=25°C, f=1.0MHz)
Item
Symbol
Test Conditions
Min
Output Capacitance
Input Capacitance
COUT
VOUT=0V
-
CIN
VIN=0V
-
NOTE : Capacitance is periodically sampled and not 100% tested.
Max
12
12
Unit
pF
pF
AC CHARACTERISTICS(TA=0°C to +70°C,VCC=3.3V/3.0V±0.3V, unless otherwise noted.)
TEST CONDITIONS
Item
Input Pulse Levels
Input Rise and Fall Times
Input and Output timing Levels
Output Loads
Value
0.45V to 2.4V
10ns
1.5V
1 TTL Gate and CL=50pF or 100pF
READ CYCLE
Item
Symbol
Read Cycle Time
tRC
Chip Enable Access Time
tACE
Address Access Time
tAA
Page Address Access Time
tPA
Output Enable Access Time
tOE
Output or Chip Disable to
Output High-Z
tDF
Output Hold from Address Change
tOH
NOTE : Page Address is determined as below.
Word mode (BHE=VIH) : A0, A1, A2
Byte mode (BHE=VIL) : A-1, A0, A1, A2
K3P7V1000B-YC10
(CL=50pF)
Min
Max
100
100
100
30
30
20
0
K3P7V1000B-YC12
(CL=100pF)
Min
Max
120
120
120
40
40
20
0
K3P7U1000B-YC12
(CL=100pF)
Unit
Min
Max
120
ns
120
ns
120
ns
40
ns
40
ns
20
ns
0
ns