K4S56163LC Datasheet, PDF (2/8 Pages) Samsung semiconductor – 16Mx16 Mobile SDRAM 54CSP

K4S56163LC-R(B)F/R
CMOS SDRAM
4M x 16Bit x 4 Banks Mobile SDRAM in 54CSP
FEATURES
• 2.5V power supply.
• LVCMOS compatible with multiplexed address.
• Four banks operation.
• MRS cycle with address key programs.
-. CAS latency (1 & 2 & 3).
-. Burst length (1, 2, 4, 8 & Full page).
-. Burst type (Sequential & Interleave).
• EMRS cycle with address key programs.
• All inputs are sampled at the positive going edge of the system
clock.
• Burst read single-bit write operation.
• Special Function Support.
-. PASR (Partial Array Self Refresh).
-. TCSR (Temperature Compensated Self Refresh).
• DQM for masking.
• Auto refresh.
• 64ms refresh period (8K cycle).
• Commercial Temperature Operation (-25°C ~ 70 °C).
• 54balls CSP (-RXXX - Pb, -BXXX - Pb Free).
FUNCTIONAL BLOCK DIAGRAM
GENERAL DESCRIPTION
The K4S56163LC is 268,435,456 bits synchronous high data rate
Dynamic RAM organized as 4 x 4,196,304 words by 16 bits, fabri-
cated with SAMSUNG's high performance CMOS technology. Syn-
chronous design allows precise cycle control with the use of
system clock and I/O transactions are possible on every clock
cycle. Range of operating frequencies, programmable burst length
and programmable latencies allow the same device to be useful for
a variety of high bandwidth, high performance memory system
applications.
ORDERING INFORMATION
Part No.
K4S56163LC-R(B)F/R75
K4S56163LC-R(B)F/R1H
K4S56163LC-R(B)F/R1L
K4S56163LC-R(B)F/R15
Max Freq.
Interface Package
133MHz(CL=3)
105MHz(CL=2)
105MHz(CL=2)
105MHz(CL=3)^*1
54 CSP
LVCMOS Pb
(Pb Free)
6 6 M H z ( C L = 2 / 3 )^{* 2}
-R(B)R ; Super Low Power, Operating Temperature ; -25°C~85°C.
-R(B)F ; Low Power, Operating Temperature ; -25 °C~85 °C.
Notes :
1. In case of 40MHz Frequency, CL1 can be supported.
2. In case of 33MHz Frequency, CL1 can be supported.
CLK
ADD
Bank Select
Data Input Register
4M x 16
4M x 16
4M x 16
4M x 16
Column Decoder
LWE
LDQM
DQi
LCKE
LRAS
LCBR
LWE
LCAS
Latency & Burst Length
Programming Register
LWCBR
LDQM
Timing Register
CLK
CKE
CS
RAS
CAS
WE L(U)DQM
* Samsung Electronics reserves the right to change products or specification without notice.
Rev. 1.4 Dec. 2002