DS_K6X8016C3B Datasheet, PDF (2/9 Pages) Samsung semiconductor – 64Kx36 & 64Kx32-Bit Synchronous Pipelined Burst SRAM

K6X8016C3B Family
CMOS SRAM
512Kx16 bit Low Power Full CMOS Static RAM
FEATURES
• Process Technology: Full CMOS
• Organization: 512K x16
• Power Supply Voltage: 4.5~5.5V
• Low Data Retention Voltage: 2.0V(Min)
• Three state output and TTL Compatible
• Package Type: 44-TSOP2-400F
GENERAL DESCRIPTION
The K6X8016C3B families are fabricated by SAMSUNG′s
advanced full CMOS process technology. The families support
various operating temperature range for user flexibility of sys-
tem design. The families also support low data retention voltage
for battery back-up operation with low data retention current.
PRODUCT FAMILY
Product Family Operating Temperature Vcc Range Speed
K6X8016C3B-B
Commercial(0~70°C)
K6X8016C3B-F
Industrial(-40~85°C)
K6X8016C3B-Q Automotive(-40~125°C)
1. The parameter is measured with 50pF test load.
4.5~5.5V
55¹⁾/70ns
Power Dissipation
Standby
(ISB1, Max)
25µA
25µA
Operating
(ICC2, Max)
35mA
40µA
PKG Type
44-TSOP2-400F
PIN DESCRIPTION
FUNCTIONAL BLOCK DIAGRAM
A4 1
44 A5
A3 2
43 A6
A2 3
42 A7
A1 4
41 OE
A0 5
40 UB
CS 6
39 LB
I/OI 7
38 I/O16
I/O2 8
37 I/O15
I/O3 9
36 I/O14
I/O4 10
35 I/O13
Vcc 11 44-TSOP2 34 Vss
Vss 12
I/O5 13
Forward 33 Vcc
32 I/O12
I/O6 14
31 I/O11
I/O7 15
30 I/O10
I/O8 16
29 I/O9
WE 17
28 A8
A18 18
27 A9
A17 19
26 A10
A16 20
25 A11
A15 21
24 A12
A14 22
23 A13
Name
Function
CS Chip Select Input
OE Output Enable Input
WE Write Enable Input
A0~A18 Address Inputs
I/O1~I/O16 Data Inputs/Outputs
Name
Function
Vcc Power
Vss Ground
UB Upper Byte(I/O9~16)
LB Lower Byte(I/O1~8)
Clk gen.
Row
Addresses
Row
select
I/O1~I/O8
I/O9~I/O16
Data
cont
Data
cont
Data
cont
CS
OE
WE
Control Logic
UB
LB
Precharge circuit.
Vcc
Vss
Memory array
I/O Circuit
Column select
Column Addresses
SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice.
2
Revision 1.0
September 2003