K4H560438D-TC Datasheet, PDF (19/25 Pages) Samsung semiconductor – 256Mb

K4H560838D
AC Operating Test Conditions
(VDD=2.5V, VDDQ=2.5V, TA= 0 to 70°C)
Parameter
Input reference voltage for Clock
Input signal maximum peak swing
Input signal minimum slew rate (for imput only)
Input slew rate (I/O pins)
Input Levels(VIH/VIL)
Input timing measurement reference level
Output timing measurement reference level
Output load condition
Value
0.5 * VDDQ
1.5
0.5
0.5
VREF+0.31/VREF-0.31
VREF
Vtt
See Load Circuit
Vtt=0.5*VDDQ
Output
RT=50Ω
Z0=50Ω
CLOAD=30pF
VREF
=0.5*VDDQ
Output Load Circuit (SSTL_2)
DDR SDRAM
Unit
V
V
V/ns
V/ns
V
V
V
Note
Input/Output Capacitance
(VDD=2.5, VDDQ=2.5V, TA= 25°C, f=1MHz)
Parameter
Input capacitance
(A0 ~ A12, BA0 ~ BA1, CKE, CS, RAS,CAS, WE)
Input capacitance( CK, CK )
Data & DQS input/output capacitance
Input capacitance(DM)
Symbol
Min
CIN1
2
CIN2
2
COUT
4.0
CIN3
4.0
Max
Delta Cap(max)
Unit
3.0
0.5
pF
3.0
0.25
pF
5.0
pF
0.5
5.0
pF
Rev. 0.4 May. 2002
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