BU7963GUW Datasheet, PDF (7/20 Pages) Rohm – Data rate 1350Mbps RGB Interface

BU7963GUW
Technical Note
●Operation Control
MSDL3 Channel Count Selection
Pin LS is used to control the high-speed data channel count and data format. The LS pin settings (i.e., high-speed data
channel count, data format) should be the same between the transmitting and receiving devices (the BU7963GUW and
BU7964GUW, respectively). Table 6 shows the PCLK input frequency ranges and transmission data rate ranges for the
LS pin settings.
LS1 LS0
‘L’ ‘L’
Table 6. The Range of The Transmission Data rate
The Number of Data Channel
The Range of PCLK Input
Frequency [MHz]
1-channel
4.0-15.0
The Range of The Data
Transmission Rate
[Mbits/sec]
120-450
‘L’ ‘H’
2-channel
8.0-30.0
240-900
‘H’ ‘L’
3-channel
12.0-45.0
360-1350
‘H’ ‘H’
Inhibit setting.
MSDL3 Pin Assignment
RVS determines the assignment of MSDL3 pins, CLK+ / CLK−, D0+ / D0−, D1+ / D1− and D2+ / D2-. Only the
MSDL3 high-speed signaling pins are affected by RVS, while pin assignment of other functions does not change.
User can select the assignment from ‘straight’ (default) and ‘flipped’ assignment in order to minimize channel-to-channel
skew in PWB design. Table 7 shows the MSDL3 pin assignment, and Fig.5 shows the ‘straight’ and ‘flipped’
RVS
‘L’
‘H’
Table 7. MSDL3 Pin Assignment
MSDL3 Pin Assignment
‘Straight’ (default matrix)
‘Flipped’
Top View
RVS='L'
Default MSDL3 terminal assignment
G
D2+ D1+ CLK+ D0+
H
D2-
D1-
CLK- D0-
1
2
3
4
5
6
7
8
(a) ‘Straight’ Pin Assignment
Top View
RVS='H'
Flipped MSDL3 terminal assignment
G
D0+ CLK+ D1+ D2+
H
D0- CLK-
D1-
D2-
1
2
3
4
5
6
7
8
(b) ‘Flipped’ Pin Assignment
Fig.5. MSDL3 Pin Assignment
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2010.04 - Rev.A