BD9745EKN Datasheet, PDF (7/22 Pages) Rohm – Silicon Monolithic Integrated Circuit

26.INV1
25.INV2
27.INV3
28.INV4
34.VREF
35.NON5
36.INV6
38.INV7
37.INV7I
REG A
SS STB1
-
+ ERRCOMP1
To Control Block
SCP CMOM1,5,6,7
-
-
-
-
+
2.2V
VBAT
Start-Up
OSC
PVCC
U.V.L.O
TIMER
LATCH
S _QR
To Driver
++-
0.8V
ERRAMP1
STEP UP/DOWN
SELECTOR1
SCPCOMP2
-
+
UDSEL1
Pch
BG
CH1 Step up DRIVER
CTL
/down
Current mode
control
PVCC
Nch
DRIVER
++-
0.8V ERRAMP2
SCPCOMP3
-
+
STEP UP/DOWN
SELECTOR2
UDSEL2
Pch
BG
CH2 Step up DRIVER
CTL
/down
PVCC
Current mode
control
Nch
DRIVER
++-
0.8V ERRAMP3
SCP COMP4
-
+
CH3
Step down
Current mode
control
Pch
DRIVER
PVCC
Nch
DRIVER
+-
+
0.8V ERRAMP4
To ERRAMP
STEP UP/DOWN
SELECTOR4
Pch
BG
CH4 Step up DRIVER
CTL
/down
Current mode
control
PVCC
Nch
DRIVER
30.VREGA
22.VBAT
14.Hx1
15-16.Lx1
17-18.PGND12
21.PVCC
20.Hx2
19.Lx2
9.Hx3
8.Lx3
4.Hx4
5.Lx4
6-7.PGND34
VOLTAGE
REFERENNCE
UDSEL4
VREGA
SS5
ERRAMP5
-
+
VREGA
PWM COMP5
++-
Pch
DRIVER
Rood
SW
2.PVCC5
1.OUT5
46.HS6H
45.HS6L
++-
0.8V ERRAMP6
VREGA
PWM COMP6
++-
ERRAMP7V
++-
0.8V
+-
+
0.4V ERRAMP7I
7V,7I priority L
PWM COMP7
+
+
+-
PVCC
Nch
DRIVER
Rood
SW
PVCC
Nch
DRIVER
44.Lx6
43.PGND567
40.HS7H
41.HS7L
42.OUT7
UVLO
STB
SOFT SS_CLK
START
OSC
ON/OFF
LOGIC
Fig. 3 Block diagram
REV. D
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