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BD9610AMUV-E2 Datasheet, PDF (21/30 Pages) Rohm – 60V Synchronous Step-down Switching Regulator(Controller type)
BD9610AMUV
●Cautions on PC Board layout
(1) It is very important to minimize the loop① and loop② for reducing switching noise caused to parasitic inductance of the
pattern. Also it should be care to the gate wiring.
VIN
HGTR2 D
CIN
S
①
LX
VOUT
L1
LG
D
TR1
②
COUT
S
PGND
Fig.39 Current loop paths on PCB
(2) The large pattern of the switching node like LX, HG and LG which change the voltage widely may cause low efficiency and
dispatch some large noises. Please minimize the switching node pattern with an enough current tolerance.
(3) The FETs are almost the hottest device in DC/DC application. Please take care for of the heat, for example use plural layer
board and connect the each drain patterns with a many thermal via. The pad of the bottom of the IC should be connected to
GND pattern.
(4) The PGND plane should be shorted at the under the BD9610AMUV to the GND plane. All GND plane should be low
impedance with using the GND plane of the middle layer. It is important to be low impedance for the stable operation.
(5) The analog sensitive nodes are affected by the switching modes. Please keep away the periphery of the analog control
section of REG5, SS, INV, FB, RCL, RTSS and RT from the periphery of the switching power section of BST, HG, LX, REG10
and LG or the periphery of the switching clock section of SYNC and CLKOUT.
(6) For stable operation, the capacitors of VCC, REG5, RTSS and the resistors of RT and RTSS should be connected to the
stable GND plane (which connected with GND pin) without common impedance with a large current node.
(7) VCC and GND nodes should be wide for reducing a line impedance to keep under a drop and a noise effect.
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TSZ02201-0Q1Q0AJ00010-1-2
24.OCT.2014 Rev.002