BD9610AMUV-E2 Datasheet, PDF (20/30 Pages) Rohm – 60V Synchronous Step-down Switching Regulator(Controller type)

BD9610AMUV
(7)About adjusting frequency characteristic of DC/DC convertor
This IC is PWM controller with voltage mode.
1st lead compensation(fz1,fz2) is adjusted using C,R around INV,FB as against 2nd lag(fp2) consisted of L,COUT for
the whole of DC/DC system stability .
As target frequency of the whole system
・Unity gain frequency (Gain =0dB):1/10~1/30 times of switching frequency(FOSC)
・Phase margin θ≧30deg
CINV
RINV
RFB
CFB
R1
INV
ERROR AMP
+A
-
PWM COMP
DRV
R2
VNON _OSC
(0.8V)
VCC
HG
L
VOUT
ESR
LG
COUT
Fig.38 The phase compensation whole DC/DC system
There are two poles (phase lag) regarding DC/DC behavior in case of above figure system.
①1st pole around ERR_AMP (fp1)
fp1 = 1 / [2・π・(R1//R2)・A・CFB] ・・・1st lag(90deg)
②Pole of LC filter(fp2)
fp2 = 1 / [2・π・√(L・C)]
・・・2nd lag (180deg)
Fix two phase lead compensation following zero points against the 2nd lag pole ②of LC filter so that these phase
may not become 180°lag.
Please set up CR constant that each frequency fz1,fz2(,fz3) became about fp2.
③Zero of output capacitor ESR (fz1)
fz1 = 1 / ( 2・π・COUT・ESR )
・・・1st lead(90deg)
④Zero around ERR_AMP(fz2)
fz2 = 1 / ( 2・π・CFB・RFB )
・・・1st lead (90deg)
⑤※Zero around ERR_AMP(fz3)
fz3 = 1 / ( 2・π・CINV・R1 )
・・・1st lead (90deg)
※There is not need to set fz3 for usable fz1 with high ESR capacitor on output
for example the electrolytic.
In addition, there is need to set fz3 for being fz1 at high frequency range with
low ESR capacitor for example the ceramic .
It is possible to adjust frequency characteristic using RINV connected value of
same R1 and R2 or 1/10 times(add pole and shifted zero point)
Please confirm actual production fully ,because ESR characteristic using electrolytic capacitor, DC bias characteristic
of ceramic changes using ceramic, temperature ,or output voltage are changed.
（Recommendation confirming bode diagram using FRA）
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TSZ22111・14・001
20/27
TSZ02201-0Q1Q0AJ00010-1-2
24.OCT.2014 Rev.002