BD9329AEFJ-LB Datasheet, PDF (2/21 Pages) Rohm – 4.2V to 18V, 3A 1ch Synchronous Buck Converter integrated FET

BD9329AEFJ-LB
Pin Configuration
(TOP VIEW)
SS
EN COMP FB
Block Diagram
Datasheet
BST VIN SW GND
Figure 2. Pin Configuration
Figure 3. Block Diagram
Pin Description
Pin No.
Pin name
1
BST
2
VIN
3
SW
4
GND
5
FB
6
COMP
7
EN
8
SS
Function
High-Side Gate Drive Boost Input
Power Input
Power Switching Output
Ground
Feed Back Input
Compensation Node
Enable Input
Soft Start Control Input
Block Operation
・VREG
A block to generate constant-voltage for DC/DC boosting.
・VREF
A block that generates internal reference voltage of 5.1 V (Typ.).
・TSD/UVLO
TSD (Thermal shutdown)/UVLO (Under Voltage Lockout) protection block.
The TSD circuit shuts down IC at high temperature.
The UVLO circuit shuts down the IC when the VIN is Low Voltage.
・Error amp block (ERR)
This is the circuit to compare the reference voltage and the feedback voltage of output voltage. The COMP pin voltage resulting from this
comparison determines the switching duty. At the time of startup, since the soft start is operated by the SS pin voltage, the COMP pin
voltage is limited to the SS pin voltage.
・Oscillator block (OSC)
This block generates the oscillating frequency.
・SLOPE block
This block generates the triangular waveform from the clock created by OSC. Generated triangular waveform is sent to the PWM
comparator.
・PWM block
The COMP pin voltage output by the error amp is compared to the SLOPE block's triangular waveform to determine the switching duty.
Since the switching duty is limited by the maximum duty ratio which is determined internally, it does not become 100%.
・DRV block
A DC/DC driver block. A signal from the PWM is input to drive the power FETs.
・OCP block
OCP (Over Current Protection) block. The current which flowed into FET is detected and OCP starts at 3.5A (min). After OCP, switching is
turned off and SS capacitor is discharged. OCP is not latch type but auto restart.
・Soft start circuit
Since the output voltage rises gradually while restricting the current at the time of startup, it is possible to prevent the output voltage
overshoot or the rush current.
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TSZ02201-0323AAJ00320-1-2
27.Feb.2014 Rev.002