BU7858KN_10 Datasheet, PDF (18/25 Pages) Rohm – Mixer & Selector ICs with 16bit D/A Converter

BU7858KN,BU7893GU
Technical Note
【BU7893GU】
No.
Matrix
No.
Pin Name
I/O
Pin Function
1 E3
AVDD
- Analog Power Supply
Terminal
Conditions
at Reset
-
Power
AVDD
Equivalent
Circuit
Diagram
-
2 C6
AVSS
- Analog Ground
-
AVDD
-
3 E6 ANAINL I DAC L-ch Input
-
AVDD
G
4 D6 ANAINR I DAC R-ch Input
-
AVDD
G
5 A3
HPOL O Headphone Amplifier Output L-ch
Pull-down AVDD
H
6 A2
7 B4
8 B1
9 A5
HPOR
CCL
CCR
SPOL
O Headphone Amplifier Output R-ch
I
Low-band Correction Capacitor
for Headphone Amplifier L-ch
I
Low-band Correction Capacitor
for Headphone Amplifier R-ch
O L-ch Line Output for Speaker
Pull-down AVDD
H
Pull-down AVDD
I
Pull-down AVDD
I
Pull-down AVDD
H
10 B5
SPOR O R-ch Line Output for Speaker
Pull-down AVDD
H
11 D5 COMOUT O Analog Reference Voltage Output
Hi-Z
AVDD
J
12 B6 COMIN I Analog Reference Voltage Input
13 A4
14 C5
15 E2
CPOP
CSTEP
PLLC
I/O
Capacitor Connection Terminal
for Pop Noise Reduction
I/O
Capacitor Connection Terminal
for Noise Reduction during Volume Change
I/O
Capacitor Connection Terminal
for PLL Loop Filter
16 E4 DVDD_CORE - Digital Core Power Supply
Hi-Z
AVDD
K
Hi-Z
AVDD
L
Hi-Z
AVDD
L
-
AVDD
L
-
DVDD_CORE
-
17 F3 DVDD_IO - Digital IO Power Supply
18 B3
19 F2
20 B2
21 E1
22 C1
23 D1
24 C2
25 E5
DVSS
CLKI
RSTB
CSB
SCLK
SIO
SO
SDI
- Digital Ground
I
PLL Reference Clock Input
(19.2/19.68/19.8 MHz)
I Reset Input L: Reset
I
CPU Interface Select Pin
(L :CPU I/F DVDD_IO : I²C I/F)
I CPU Interface Clock
I/O
CPU Interface Data Input/Output
(at Reset Input)
I/O
CPU Interface Data Output
(connected to DVSS when not in use)
I Audio DAC Digital Data Input
-
DVDD_IO
-
-
DVDD_IO,
DVDD_CORE
-
-
DVDD_IO
D
-
DVDD_IO
A
-
DVDD_IO
B
-
DVDD_IO
A
Hi-Z
DVDD_IO
F
Hi-Z
DVDD_IO
E
Hi-Z
DVDD_IO
C
26 F4
BCLK I/O Audio DAC Bit Clock (Input State at Reset)
Hi-Z
DVDD_IO
E
27 F5 LRCLK I/O Audio DAC LR Clock (Input State at Reset)
Hi-Z
DVDD_IO
E
28 D2 MCLK I/O Audio DAC Master Clock (Input State at reset ) Hi-Z
DVDD_IO
E
29 F6
TEST1
I
Test Pin
(connected to DVSS during normal operation)
Pull-down
DVDD_IO
C
30 F1
TEST2
I
Test Pin
(connected to DVSS during normal operation)
Pull-down
DVDD_IO
C
31 A1 TEST3 I/O Test Pin (released during normal operation)
-
DVDD_IO
E
32 A6 TEST4 I Test Pin (released during normal operation)
-
AVDD
-
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2010.09 - Rev.A