BU9891GUL-W_12 Datasheet, PDF (17/26 Pages) Rohm – WLCSP EEPROM

BU9891GUL-W (4Kbit)
Datasheet
6) When to directly connect DI and DO
This IC has independent input terminal DI and output terminal DO, and separate signals are handled on timing chart,
meanwhile, by inserting a resistance R between these DI and DO terminals, it is possible to carry out control by 1 control
line.
Microcontroller
EEPROM
DI/O PORT
DI
R
DO
Figure 47. DI, DO control line common connection
○Data collision of microcontroller DI/O output and DO output and feedback of DO output to DI input.
Drive from the microcontroller DI/O output to DI input on I/O timing, and signal output from DO output occur at the
same time in the following points.
(1) 1 clock cycle to take in A0 address data at read command
Dummy bit “0” is output to DO terminal.
→When address data A0 = “1” input, through current route occurs.
EEPROM CS input
“H”
EEPROM SK input
EEPROM DI input
EEPROM DO output
A1 A0
Collision of DI input and DO output
High-Z
0 D15 D14 D13
Microcontroller DI/O port
A1 A0
High-Z
Microcontroller output Microcontroller input
Figure 48. Collision timing at read data output at DI, DO direct connection
(2) Timing of CS = “H” after write command. DO terminal in READY / BUSY function output.
When the next start bit input is recognized, “HIGH-Z” gets in.
→Especially, at command input after write, when CS input is started with microcontroller DI/O output “L”,
READY output “H” is output from DO terminal, and through current route occurs.
Feedback input at timing of these (1) and (2) does not cause disorder in basic operations, if resistance R is inserted.
～～
EEPROM CS input
Write command
～～
～～
EEPROM SK input
Write command
～～
～～
EEPROM DI input
Write command
～～
EEPROM DO output
Write command
BU_～S_～ Y
READY
～～
READY
High-Z
Collision of DI input and DO output
Microcontroller DI/O port
Write command
BUSY
～～
READY
～～
Microcontroller output
Microcontroller input
Microcontroller output
Figure 49. Collision timing at DI, DO direct connection
Note) As for the case (2), attention must be paid to the following.
When status READY is output, DO and DI are shared, DI=”H” and the microcontroller DI/O=”High-Z” or the microcontroller DI/O=”H”,if SK clock is
input, DO output is input to DI and is recognized as a start bit, and malfunction may occur. As a method to avoid malfunction, at status READY
output, set SK=“L”, or start CS within 4 clocks after “H” of READY signal is output.
CS
Start bit
SK
DI
READY
DO
Because DI=”H”, set
SK=”L” at CS rise.
High-Z
Figure 50. Start bit input timing at DI, DO direct connection
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TSZ22111・15・001
17/22
TSZ02201-0R2R0G100440-1-2
3.SEP.2012 Rev.001