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BD9489F Datasheet, PDF (17/39 Pages) Rohm – DCDC converter with current mode | |||
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BD9489F
3.2.2 Shutdown Method and REG58 Capacitance Setting
When this IC shuts down, VOUT discharge function works. Indicated below is the sequence.
Datasheet
Figure 26. The waveform and diagram at shutdown
âSequence explanation of shutdown
1. When STB=L, GATE and REG58 stop.
2. While STB=L and REG58UVLO=H, DIMOUT asserts the same logic of PWM. And VOUT is discharged until
REG58=5.8V reaches 2.3V by -5μA(typ.).
3. When VOUT is discharged enough by ILED, ILED doesnât get to flow.
4. When REG58 voltage reaches under 2.3V(typ), whole system is shutdown.
âSetting method of REG58 capacitance
When REG58 terminal capacitance is defined as CREG , shutdown time TOFF is decided by the following equation.
TOFF
ï½
CREG[ïF]ãï´ ã(5.8 ï
5 [ïA]
2.3)
[V]
ã[sec]
When discharge function is used, PWM signal must be continuously inputted after STB=L.
VOUT discharge time is longest when PWM is set on mininum DUTY.
Please set CREG capacitance value with margin so that the system is shutdown after VOUT is discharged enough.
3.2.3 VCC Series Resistance Setting
Here are the following effects of inserting series resistor Rvcc into VCC line.
(i) In order to drop the voltage VCC, it is possible to suppress the heat
generation of the IC.
(ii) It can limit the inflow current to VCC line.
However, if resistance RVCC is set bigger, VCC voltage becomes under
minimum operation voltage (VCC<9V). RVCC must be set to an appropriate
series resistance.
ICâs inflow current line I_IN has the following inflow lines.
ã»ICâs circuit currentâ¦ICC
ã»Current of RREG connected to REG58â¦IREG
ã»Current to drive FETâs Gateâ¦I_GATE
These decide the voltage ÎV at RVCC.
VCC terminal voltage at that time can be expressed as follows.
VCCã[V]ãï½ ãVINã[V] ï ï¨ICCã[A] ï« IDCDCã[A] ï« IREGã[A] ï©ï´RVCCã[â¦]ã ï¾ 9ã[V]
Here, judgement is the 9V minimum operation voltage.
Please consider a sufficient margin when setting the series resistor of VCC.
Internal
BLOCK
VIN
ICC
+
-
RVCC
ÎV
VCC
I_IN
IREG REG58
IDCDC
RREG
DCDC
DRIVER
GATE I_GATE
ãsetting exampleã
Above equation is translated as follows.
RVCCã[â¦] ï¼
VINã[V] ï 9ã[V]
ICCã[A] ï« IDCDCã[A] ï« IREGã[A]
Figure 27.VCC series resistance
circuit example
When VIN=24V, ICC=2.0mA, RREG=10k⦠and IDCDC=2mA, RVCCâs value is calculated as follows.
RVCCã[â¦]
ï¼
0.002ã[A]
ï«
24ã[V] ï 9ã[V]
0.002ã[A] ï« 5.8ã[V]ã1ã0000ã[â¦]
ï½
3.26ã[kâ¦]
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TSZ02201-0F1F0C100250-1-2
29.Oct 2014 Rev.002
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