BD9132MUV_12 Datasheet, PDF (15/20 Pages) Rohm – 2.7V to 5.5V, 3.0A 1ch Synchronous Buck Converter integrated FET

BD9132MUV
BD9132MUV Cautions on PC Board Layout
Datasheet
Fig.36 Layout diagram
① Lay out the input ceramic capacitor CIN closer to the pins PVCC and PGND, and the output capacitor Co closer to the
pin PGND.
② Lay out CITH and RITH between the pins ITH and GND as neat as possible with least necessary wiring.
※ VQFN020V4040 (BD9132MUV) has thermal PAD on the reverse of the package.
The package thermal performance may be enhanced by bonding the PAD to GND plane which take a large area
of PCB.
Recommended Components Lists on Above Application
Symbol
Part
Value
L Coil
2.0uH
2.2uH
CIN Ceramic capacitor
22uF
CO Ceramic capacitor
CITH Ceramic capacitor
RITH Resistance
Cf Ceramic capacitor
22uF
VOUT=1.0V
1500pF
VOUT=1.2V
VOUT=1.5V
VOUT=1.8V
VOUT=2.5V
VOUT=3.3V
VOUT=1.0V
VOUT=1.2V
VOUT=1.5V
VOUT=1.8V
VOUT=2.5V
VOUT=3.3V
1000pF
1000pF
560pF
560pF
330pF
5.6kΩ
6.8kΩ
6.8kΩ
8.2kΩ
12kΩ
15kΩ
1000 pF
Rf Resistance
10Ω
CBST Ceramic capacitor
0.1 uF
Manufacturer
Sumida
Sumida
Murata
Murata
Murata
Murata
Murata
Murata
Murata
Murata
Rohm
Rohm
Rohm
Rohm
Rohm
Rohm
Murata
Rohm
Murata
Series
CDR6D28MNP-2R0NC
CDR6D26NP-2R2NC
GRM32EB11A226KE20
GRM31CB30J226KE18
CRM18 Serise
GRM18 Serise
GRM18 Serise
GRM18 Serise
GRM18 Serise
GRM18 Serise
MCR03 Serise
MCR03 Serise
MCR03 Serise
MCR03 Serise
MCR03 Serise
MCR03 Serise
GRM18 Serise
MCR03 Serise
GRM18 Serise
※The parts list presented above is an example of recommended parts. Although the parts are sound, actual circuit
characteristics should be checked on your application carefully before use. Be sure to allow sufficient margins to
accommodate variations between external devices and this IC when employing the depicted circuit with other circuit
constants modified. Both static and transient characteristics should be considered in establishing these margins. When
switching noise is substantial and may impact the system, a low pass filter should be inserted between the VCC and PVCC
pins, and a schottky barrier diode or snubber established between the SW and PGND pins.
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02.MAR.2012 Rev.001