BU9832GUL-W_10 Datasheet, PDF (14/19 Pages) Rohm – WL-CSP EEPROM family SPI BUS

BU9832GUL-W
Technical Note
○SO load capacity condition
Load capacity of SO output pin affects upon delay characteristic of SO output. (Data output delay time, time from HOLD
to High-Z) In order to make output delay characteristic into higher speed, make SO load capacity small. In concrete, “Do
not connect many devices to SO bus”, “Make the wire between the controller and EEPROM short”, and so forth.
tPD-CL characteristics
80
V c c =2.5V　 T a=25℃
70 VIH/VIL=0.8Vcc/0.2Vcc
Spe c
60
Spe c
50
40
EEPROM
SO
CL
30
20
0
20
40
60
80
100 120
CL[pF]
Fig.52 SO load dependency of data output delay time
○Other cautions
Make the wire length from the microcontroller to EEPROM input signal same length, in order to prevent setup / hold
violation to EEPROM, owing to difference of wire length of each input.
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14/18
2010.10 - Rev.A