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BU9796AFS-E2 Datasheet, PDF (14/32 Pages) Rohm – Standard LCD Segment Driver | |||
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BU9796Axxx Series MAX 80 segments (SEG20ÃCOM4)
Datasheet
âMode Set (MODE SET)
MSB
LSB
D7 D6 D5 D4 D3 D2 D1 D0
C
1
0
*
P3 P2
*
*
( * : Donât care)
Set display ON and OFF
Setting
P3
Display OFF
0
Display ON
1
Reset initialize condition
â
Display OFF : Regardless of DDRAM data, all SEGMENT and COMMON output will be stopped after 1frame off
data write. Display OFF mode will be disabled after Display ON command.
Display ON : SEGMENT and COMMON output will be active and start to read the display data from DDRAM.
Set bias level
setup
P2
1/3 Bias
0
1/2 Bias
1
Refer to LCD driving waveform
Reset initialize condition
â
âAddress set (ADSET)
MSB
LSB
D7 D6 D5 D4 D3 D2 D1 D0
C
0
0 P4 P3 P2 P1 P0
The range of address can be set as 00000 to 10011(2).
Donât set out of range address, otherwise address will be set 00000.
âSet IC Operation (ICSET)
MSB
LSB
D7 D6 D5 D4 D3 D2 D1 D0
C
1
1
0
1
*
P1 P0
( * : Donât care)
Set software reset execution
Setup
P1
No operation
0
Software Reset execute
1
This command will be set initialize condition.
Set oscillator mode
setup
P0
Reset initialize condition
Internal oscillation
0
â
External clock input
1
Internal oscillation: Must be connected to VSS.
External clock input: Input external clock from OSCIN terminal
ãFrame frequency Calculation at external clock modeã
DISCTL 80Hz setting: Frame frequency [Hz] = external clock [Hz] / 512
DISCTL 71Hz setting: Frame frequency [Hz] = external clock [Hz] / 576
DISCTL 64Hz setting: Frame frequency [Hz] = external clock [Hz] / 648
DISCTL 53Hz setting: Frame frequency [Hz] = external clock [Hz] / 768
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TSZ02201-0A2A0D300100-1-2
13.Jun.2014 Rev.003
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