BU9883FV-W Datasheet, PDF (12/19 Pages) Rohm – I2C BUS 3Ports for HDMI Port Serial EEPROM

○When the command just before Current Read cycle is Random Read cycle or Current Read cycle (each including
Sequential Read cycle), data of incremented last read address (n)-th address, i.e.n, data of the (n+1)-th address is
output. When the command just before Current Read cycle is Byte Write or Page write, data of latest write address
is output.
○Random read operation allows the master to access any memory location. The BANK which is appointed by P1,
P0. This operation involves a two-step process.
First, the master issues a write command which includes the start condition and the slave address field (with R/W
set to “0”) followed by the address of the word be read. This procedure sets the internal address counter of this
device to the desired address. After the word address acknowledge is received by the master, the master
immediately reissues a start condition followed by the slave address field with R/W the set to “1.” This device will
respond with an acknowledge and then transmit the 8-data bits stored
at the addressed location.
If the master does not acknowledge the transmission but does generate the stop condition, at this point this device
discontinues transmission.
note）If the master send Acknowredge at after D0 output, Sequential Read is selected, and this device output
next address data, and master can't send stop condition, so master can't discontinues transmission. To stop read
command, the master must send no Acknowledge at after D0 output, and issue stop condition.
SDA
LINE
S
T
R
A
E
R
SLAVE
A
T
ADDRESS
D
DATA(n)
1010 0 00
D7
※1 R A
/C
WK
D0
A
C
K
WPB
S
T
DATA(n+x)
O
P
D7
A
C
K
D0
A
C
K
Fig.49 SEQUENTIAL READ CYCLE TIMING （PORT1～3）
○During the sequential read operation, the internal address counter of this device automatically increments with
each acknowledge received ensuring the data from address n will be followed with the data from n+1. For read
operations, all bits of the address counter are incremented allowing the entire array to be read during a single
operation. When the counter reaches the top of the array, it will “roll over to the bottom of the array and continue to
transmit the data.
○The sequential read operation can be performed with both current read and random read.
●Access Control of PORT0,1,2,3
WPB terminal controls access enable of each PORT, as follows.
PORT
WPB terminal inputs
0
1
PORT0
not accessible
Read/Write
PORT1
Read
not accessible
PORT2
Read
not accessible
PORT3
Read
not accessible
Table4 WPB terminal and port accesibility
○When WPB terminal is “HIGH”, PORT0 only can access this device.
In this case, when commands from PORT1, 2, 3 are inputted, these port don't return acknowledge.
○When WPB terminal is “LOW”, PORT0 access is not valid, but PORT1, 2, 3 can access this device this device.
Commands from PORT1, 2, 3 is performs independently other port.
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