BU7858KN_07 Datasheet, PDF (12/25 Pages) Rohm – Mixer & Selector With 16bit D/A Converters

【BU7893GU】
・Timing Chart
SCLK
SIO
Tsc
Thc
AD[6] AD[5] AD[4]
AD[0] Direction DT[7] DT[6]
SEL
Tscss
・Write Operation
SCLK
When direction is "1": Write operation
When direction is "0": Read operation
DT[1] DT[0]
SIO
AD[6] AD[5] AD[4]
AD[0]
DT[7] DT[6]
Direction”H”
SEL
DT[1] DT[0]
・Read Operation (mode 1): SO_ENABLE (bit0 at register address 14h)=0
SCLK
SIO
SEL
AD[6]
AD[5]
AD[4]
Tsd
AD[0]
Hi-Z DT[7]
Direction”L”
DT[6]
Output data
DT[1] DT[0]
・Read Operation (mode 2): SO_ENABLE (bit0 at register address 14h)=1
SCLK
SIO
AD[6]
SO
Hi-Z
AD[5]
AD[4]
Tsd
AD[0]
Direction”L”
DT[7]
DT[6]
DT[5]
DT[1] DT[0] _Hi-Z
Output data
SEL
Fig.34 CPU I/F Timing Chart (BU7893GU)
DVDD_IO=1.62～3.3V、Ta=-30～+85℃
Item
Bit Length
Symbol Min
Typ
Max Unit
Conditions
Ncha
16
－
－
bit MSB first
SCLK Input Frequency
SCLK ‘L’ Pulse Width
SCLK ‘H’ Pulse Width
SCLK-SEL Set-up Time
FSCLK
－
－
15
MHz
Tlsclk
25
－
－
ns
Thsclk
25
－
－
ns
Tscss
10
－
－
ns
Data Set-up Time
Data Hold Time
Tsc
10
－
－
ns
Thc
10
－
－
ns
Delay Time of Data Output
Tsd
－
－
30
ns ^{SIO: Time from SCLK falling edge}
SO : Time from SCLK rising edge
It is recommended to use exclusive lines for CPU interface.
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