BDXXFA1FP3 Datasheet, PDF (12/17 Pages) Rohm – High accuracy output voltage

BDxxFA1FP3
Datasheet
(11) Regarding input pins of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Pin A
N ^{P+ N}
Parasitic element
Resistor
Pin A
Transistor (NPN)
Pin B _{C B}
E
Pin B
P
P⁺ _N
P substrate
GND
Parasitic
element
N _P+
NP
P⁺ _N
Parasitic element
P substrate
GND
GND
B
C
E
Parasitic
GND ^element
Other adjacent elements
Example of monolithic IC structure
(12) Ground wiring pattern
When using both small-signal and large-current GND traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the GND traces of external components do not cause variations on
the GND voltage. The power supply and ground lines must be as short and thick as possible to reduce line impedance.
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