BU9408KS2_12 Datasheet, PDF (10/57 Pages) Rohm – 32bit Audio DSP with Built-in 4ch DAC and ASRC

BU9408KS2
Technical Note
2. Data and System-clock setting
The input-and-output distribution diagram of the audio data of BU9408KS2 is shown below.
DATAI1,BCKI1,LRCKI1
DATAI2,BCKI2,LRCKI2
DATAI3,BCKI3,LRCKI3
I2S_IN1
I2S_IN2
I2S_IN3
PLL1
S-P
CONV1
S
S-P
E
CONV2
L _PLL2
1
②
①
ASRC
DSP operation part
Tone
Func.
Main
P-EQ
EVR
DATAI4,BCKI4,LRCKI4 ^I2S_IN4
SEL6
CG
Audio DSP
(BU9408KS2)
Control I/F
・・・
P-S _{I2S_OUT_Main}
CONV1
DATAMO,BCKO,LRCKO
S
E
L
S
E
L
⑤
P-S
I2S_OUT_Sub
5 CONV2
DATASO
(ERR2_BCK, ERR1_LRC)
2
SPDIF
Dec
S ^S/PDIF
E
SPDIFO
L
7
S
E
L
3
DF1
③
ΔΣ LINE OUT
DAC
AOUTL2,AOUTR2
S
E
L
4
DF2
④ _16bit
DAC
HP OUT
AOUTL1,AOUTR1
BU9408KS2 has a 4-line digital stereo input, 3-line digital stereo output and 2-line analog stereo output.
The digital data input to the DSP operation part is first changed to fs=48kHz data at the ASRC (asynchronous sampling
rate converter).
DSP operation part output is changed to either I²S format digital output, S/PDIF format digital serial output or analog
output.
2-1. Input data selection to S-P Conversion 1 (SEL1)
Default = 0
Select Address
&h03 [ 1:0 ]
Value
0
1
2
3
Operation Description
Input data from I2S_IN1
Input data from I2S_IN2
Input data from I2S_IN3
Input data from I2S_IN4
2-2. Input data selection to S-P Conversion 2 (SEL1)
Default = 0
Select Address
&h03 [ 5:4 ]
Value
0
1
2
3
Operation Description
Input data from I2S_IN1
Input data from I2S_IN2
Input data from I2S_IN3
Input data from I2S_IN4
2-3. Output data selection P-S Conversion 1 for DATAMO terminal (SEL2)
Default = 0
Select Address
&h04 [ 1:0 ]
Value
0
1
2
Operation Description
Main data output after DSP operation
Sub data output after DSP operation
Data output before DSP operation
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10/53
2012.03 - Rev.A