RV5C339A Datasheet, PDF (49/51 Pages) RICOH electronics devices division – 3-WIRE SERIAL INTERFACE REAL-TIME CLOCK ICs WITH VOLTAGE MONITORING FUNCTION

RV5C339A
8.4 Interrupt Process
8.4-1 Periodic Interrupt
Set Periodic Interrupt
Cycle Selection Bits
*¹
*1) This step is intended to select the level mode as a waveform mode for the
periodic interrupt function.
*2) This step is intended to set the CTFG bit to 0 in the control register 2 to
cancel an interrupt to the CPU.
Generate Interrupt to CPU
NO
CTFG=1?
YES
Periodic Interrupt Process
Other Interrupt
Processes
Write “×,1,×,1,×,0,1,1” _*²
to Control Register 2
8.4-2 Alarm Interrupt
WALE or DALE=0
*¹
Set Alarm Minute, Hour,
and Day-of-week Registers
WALE or DALE=1
*²
*1) This step is intended to once disable the alarm interrupt circuit by setting
the WALE and DALE bits to 0 in anticipation of the coincidental occurrence
of a match between current time and preset alarm time in the process of
setting the alarm interrupt function.
*2) This step is intended to enable the alarm interrupt function after completion
of all alarm interrupt settings.
*3) This step is intended to once cancel the alarm interrupt function by writing
the settings of “×,1,×,1,×,1,0,1” and “×,1,×,1,×,1,1,0” to the Alarm_W
registers and the Alarm_D registers, respectively.
Generate Interrupt to CPU
WAFG or DAFG=1?
YES
Conduct Alarm Interrupt
Write “×,1,×,1,×,1,0,1”
to Control Register 2
NO
Other Interrupt
Processes
*³
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