RV5C339A Datasheet, PDF (10/51 Pages) RICOH electronics devices division – 3-WIRE SERIAL INTERFACE REAL-TIME CLOCK ICs WITH VOLTAGE MONITORING FUNCTION

RV5C339A
GENERAL DESCRIPTION
1. Interface with CPU
The RV5C339A is connected to the CPU by three signal lines CE (Chip Enable), SCLK (Serial Clock), SIO (Serial
Input/Output), through which it reads and write data from and to the CPU. The CPU can access when the CE pin is
held high. Access clock pulses have a maximum frequency of 2MHz (at 5 volts), allowing high-speed data transfer
to the CPU.
2. Clock and Calendar Function
The RV5C339A reads and writes time data from and to the CPU in units ranging from seconds to the last two digits
of the calendar year. The calendar year will automatically be identified as a leap year when its last two digits are a
multiple of 4. Also available is the 1900/2000 identification bit for Year 2000 compliance. Consequently, leap years
up to the year 2099 can automatically be identified as such.
*^{) The year 2000 is a leap year while the year 2100 is not a leap year.}
3. Alarm Function
The RV5C339A incorporates an alarm circuit configured to generate interrupt signals to the CPU for output at preset
times. The alarm circuit allows two types of alarm settings specified by the Alarm_W registers and the Alarm_D
registers. The Alarm_W registers allow week, hour, and minute alarm settings including combinations of multiple
day-of-week settings such as “Monday, Wednesday, and Friday” and “Saturday and Sunday”. The Alarm_D regis-
ters allow hour and minute alarm settings. The Alarm_D signal outputs from INTRA pin, and the Alarm_W signal
outputs from INTRB pin. The current INTRA or INTRB conditions specified by the flag bits for each alarm function
can be checked from the CPU by using polling function.
4. High-precision Oscillation Adjustment Function
The RV5C339A has built-in oscillation stabilization capacitors (CG and CD), which can be connected to an external
crystal oscillator to configure an oscillation circuit. To correct deviations in the oscillation frequency of the crystal
oscillator, the oscillation adjustment circuit is configured to allow correction of a time count gain or loss (up to ±1.5
ppm at 25˚C) from the CPU within a maximum range of approximately ±189 ppm in increments of approximately 3
ppm. Such oscillation frequency adjustment in each system has the following advantages:
· Allows timekeeping with much higher precision than conventional real-time clocks while using a crystal oscillator
with a wide range of precision variations.
· Corrects seasonal frequency deviations through seasonal oscillation adjustment.
· Allows timekeeping with higher precision particularly in systems with a temperature sensing function through
oscillation adjustment in tune with temperature fluctuations.
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