DS5028E Datasheet, PDF (37/41 Pages) Richtek Technology Corporation – Integrated PMIC with 4-Channel Synchronous Buck Converters, 8 LDOs, and MTP Non-Volatile Memory for Industrial Applications

RT5028E
MTP Page-2
MTP _{I2C Register Address Bit7}
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Address
Function
REBOOT/PWRHOLD delay time control
Meaning
Delayed2[1:0]
Delayed1[1:0]
THOLD
Reserved DisTHOLD
0x00 0x10
Default
1
0
1
0
0
0
0
1
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Condition B
B
B
B
B
B
B
B
Function
PWRON time Parameters Setting / RESET delay
Meaning
START_TIME
L_PRESS_TIME
SHDN_PRESS
RESET_DLY
0x01 0x14
Default
0
0
0
0
0
0
1
0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Condition A
A
A
A
A
A
A
A
0x02 0x15
Function
Meaning
Default
SHDN_
CTRL
0
SHDN_
TIMING
1
SHDN Control
SHDN_DLYTIME Reserved Reserved Reserved Reserved
0
0
0
0
0
0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Condition B
B
B
B
B
B
B
B
Function
PMU On/Off Sequence1
Meaning
Buck2_Seq[3:0]
Buck1_Seq[3:0]
0x03 0x2C Default
0
0
1
1
0
0
0
1
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Condition A
A
A
A
A
A
A
A
Function
PMU On/Off Sequence2
Meaning
Buck4_Seq[3:0]
Buck3_Seq[3:0]
0x04 0x2D Default
0
0
1
1
0
0
1
0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Condition A
A
A
A
A
A
A
A
Function
PMU On/Off Sequence3
Meaning
LDO2_Seq[3:0]
LDO1_Seq[3:0]
0x05 0x2E Default
0
0
1
1
0
1
0
0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Condition A
A
A
A
A
A
A
A
Copyright ©2016 Richtek Technology Corporation. All rights reserved.
DS5028E-00 October 2016
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
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