DS8816A Datasheet, PDF(16/21 Page) Richtek Technology Corporation – Dual-Phase PWM Controller with PWM-VID Reference

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

DS8816A Datasheet, PDF (16/21 Pages) Richtek Technology Corporation – Dual-Phase PWM Controller with PWM-VID Reference

◁

RT8816A

RSTANDBY ï½

RREF2 ï´ ï¨RREF1 ï« RBOOT ï© ï´ VSTANDBY

ï¨ ï© RREF2 ï´ VREF ï VSTANDBY ï´ RREF1 ï« RREF2 ï« RBOOT

ïRREF1

Normal Mode

If the VID pin is driven by a PWM signal and switch Q1 is

disabled as shown in Figure 9, the VREFIN can be adjusted

from Vmin to Vmax, where Vmin is the voltage at zero percent

PWM duty cycle and Vmax is the voltage at one hundred

percent PWM duty cycle. The Vmin and Vmax can be set

by the following equations :

Vmin

VVREF

ï´

RREF2

RREF2 ï« RBOOT

ï ï ï´

RREFADJ // (RBOOT ï« RREF2 )

RREF1 ï« RREFADJ // (RBOOT ï« RREF2

)

Vmax

VVREF ï´ (RREF1

RREF2

RREFADJ ) ï« RBOOT

ï« RREF2

By choosing RREF1, RREF2, and RBOOT, the RREFADJ can be

calculated by the following equation :

RREFADJ

ï½

RREF1 ï´ Vmin

Vmax ï Vmin

The relationship between VID duty and VREFIN is shown in

Figure 10, and VOUT can be set according to the calculation

below :

VOUT = Vmin ï« Nï´ VSTEP

where VSTEP is the resolution of each voltage step 1 :

VSTEP

(Vmax ï Vmin )

Nmax

where Nmax is the number of total available voltage

steps and N is the number of step at a specific VOUT.

The dynamic voltage VID period (Tvid = Tu x Nmax) is

determined by the unit pulse width (Tu) and the available

step number (Nmax). The recommended Tu is 27ns.

www.richtek.com

VREFIN

N = Nmax

Vmax

N=2

N=1

Vmin

0.5

VID Duty

N=1

N=2

Tvid = Nmax x Tu

VID Input

Figure 11. PWM VID Analog Output

VID Slew Rate Control

In RT8816A, the VREFIN slew rate is proportional to PWM

VID duty, the rising time and falling time are the same. In

normal mode, the VREFIN slew rate SR can be estimated

by CREFADJ or CREFIN as the following equation :

When choose CREFADJ :

SR =

(VREFIN_Final ï VREFIN_initial )ï´ 80%

2.2RSRCREFADJ

ï ï RSR = (RREF1 // RREFADJ ) // (RBOOT +RREF2 )

When choose CREFIN :

SR =

(VREFIN_Final ï VREFIN_initial )ï´ 80%

2.2RSRCREFIN

The recommend SR is estimated by CREFADJ.

Current Limit

The RT8816A provides cycle-by-cycle current limit

control by detecting the PHASE voltage drop across

the low-side MOSFET when it is turned on. The current

limit circuit employs a unique âvalleyâ current sensing

algorithm as shown in Figure 12. If the magnitude of

the current sense signal at PHASE is above the current

limit threshold, the PWM is not allowed to initiate a

new cycle.

In order to provide both good accuracy and a cost

effective solution, the RT8816A supports temperature

compensated MOSFET RDS(ON) sensing.

is a registered trademark of Richtek Technology Corporation.

DS8816A-00 September 2016

▷