RFFC5061 Datasheet, PDF (5/25 Pages) RF Micro Devices – WIDEBAND SYNTHESIZER/VCO WITH INTEGRATED 6GHz MIXER

RFFC5061/62
Theory of Operation
The RFFC5061 and RFFC5062 are wideband RF frequency converter chips which include a fractional-N synthesizer and a low
noise VCO core. The RFFC5061 has an LO signal multiplexer, two LO buffer circuits, and two RF mixers. The RFFC5062 has a
single LO buffer circuit and one RF mixer. Both devices have an integrated voltage reference and low drop out regulators sup-
plying critical circuit blocks such as the VCOs and synthesizer. Synthesizer programming, device configuration and control are
achieved through a mixture of hardware and software controls. All on-chip registers are programmed through a simple 3-wire
serial interface.
VCO
The VCO core in the RFFC5061 and RFFC5062 consists of three VCOs which, in conjunction with the integrated LO dividers of
/2 to /32, cover the LO range of 85MHz to 4200MHz. Each VCO has 128 overlapping bands which are used to achieve low
VCO gain and optimal phase noise performance across the whole tuning range. The chip automatically selects the correct VCO
(VCO auto-select) and VCO band (VCO coarse tuning) to generate the desired LO frequency based on the values programmed
into the PLL1 and PLL2 registers banks.
The VCO auto-select and VCO coarse tuning are triggered every time ENBL is taken high, or if the PLL re-lock self clearing bit is
programmed high. Once the correct VCO and band have been selected the PLL will lock onto the correct frequency. During the
band selection process, fixed capacitance elements are progressively connected to the VCO resonant circuit until the VCO is
oscillating approximately at the correct frequency. The output of this band selection, CT_CAL, is made available in the read-
back register. A value of 127 or 0 in this register indicates that the coarse tuning was unsuccessful, and this will also be indi-
cated by the CT_FAILED flag also available in the read-back register. A CT_CAL value between 1 and 126 indicates a success-
ful calibration, the actual value being dependent on the desired frequency as well as process variation for a particular device.
The band select process will center the VCO tuning voltage at about 1.0V, compensating for manufacturing tolerances and pro-
cess variation as well as environmental factors including temperature. In applications where the device is left enabled at the
same LO frequency for some time, it is recommended that automatic band selection be performed for every 30°C change in
temperature. This assumes an active loop filter.
The RFFC5061 and RFFC5062 feature a differential LO input to allow the mixer to be driven from an external LO source. The
fractional-N PLL can be used with an external VCO driven into this LO input, which may be useful to reduce phase noise in
some applications. This may also require an external op-amp, dependant on the tuning voltage required by the external VCO.
In the RFFC5061 the LO signal is routed to mixer 1, mixer 2, or both mixers depending on the state of the MODE pin (or MODE
bit if under software control) and the value of the FULLD bit. Setting FULLD high puts the device into Full Duplex mode and both
mixers are enabled.
Fractional-N PLL
The RFFC5061 and RFFC5062 contain a charge pump-based fractional-N phase locked loop (PLL) for controlling the three
VCOs. The PLL has been designed to use a standard crystal of between 10MHz and 26MHz. The PLL includes automatic cali-
bration systems to counteract the effects of process and environmental variations, ensuring repeatable loop response and
phase noise performance. As well as the VCO auto-select and coarse tuning, there is a loop filter calibration mechanism which
can be enabled if required. This operates by adjusting the charge pump current to maintain loop bandwidth. This can be useful
for applications where the LO is tuned over a wide frequency range.
Two PLL programming banks are provided, the first bank is preceded by the label PLL1 and the second bank is preceded by the
label PLL2. For the RFFC5061 these banks are used to program mixer 1 and mixer 2 respectively, and are selected automati-
cally as the mixer is selected using MODE. For the RFFC5062 mixer 2 and register bank PLL2 are normally used.
The VCO outputs are first divided down in a high frequency prescalar. The output of this high frequency prescalar then enters
the N divider, which is a fractional divider containing a dual-modulus prescaler and a digitally spur-compensated fractional
sequence generator. This allows very fine frequency steps and minimizes fractional spurs. The fractional energy is randomized
and appears as fractional noise at frequency offsets above 100kHz which will be attenuated by the loop filter. An external loop
filter is used, giving flexibility in setting loop bandwidth for optimizing phase noise and lock time, for example.
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