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RX6501 Datasheet, PDF (9/10 Pages) RF Monolithics, Inc – 868.35 MHz Hybrid Receiver
Pin
Name
Description
The interval between the falling edge of an ON pulse to the first RF amplifier and the rising edge of the next ON pulse to
the first RF amplifier tPRI is set by a resistor RPR between this pin and ground. The interval tPRI can be adjusted between
0.1 and 5 µs with a resistor in the range of 51 K to 2000 K. The value of RPR is given by:
RPR = 404* tPRI + 10.5, where tPRI is in µs, and RPR is in kilohms
A ±5% resistor value is recommended. When the PWIDTH pin is connected to Vcc through a 1 M resistor, the RF amplifi-
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PRATE
ers operate at a nominal 50%-50% duty cycle, facilitating high data rate operation. In this case, the period tPRC from start-
to-start of ON pulses to the first RF amplifier is controlled by the PRATE resistor over a range of 0.1 to 1.1 µs using a resis-
tor of 11 K to 220 K. In this case the value of RPR is given by:
RPR = 198* tPRC - 8.51, where tPRC is in µs and RPR is in kilohms
A ±5% resistor value should also be used in this case. Please refer to the ASH Transceiver Designer’s Guide for additional
amplifier duty cycle information. It is important to keep the total capacitance between ground, Vcc and this pin to less than
5 pF to maintain stability.
The PWIDTH pin sets the width of the ON pulse to the first RF amplifier tPW1 with a resistor RPW to ground (the ON pulse
width to the second RF amplifier tPW2 is set at 1.1 times the pulse width to the first RF amplifier). The ON pulse width tPW1
can be adjusted between 0.55 and 1 µs with a resistor value in the range of 200 K to 390 K. The value of RPW is given by:
RPW = 404* tPW1 - 18.6, where tPW1 is in µs and RPW is in kilohms
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PWIDTH A ±5% resistor value is recommended. When this pin is connected to Vcc through a 1 M resistor, the RF amplifiers operate
at a nominal 50%-50% duty cycle, facilitating high data rate operation. In this case, the RF amplifier ON times are con-
trolled by the PRATE resistor as described above. It is important to keep the total capacitance between ground, Vcc and
this node to less than 5 pF to maintain stability. When using the high data rate operation with the sleep mode, connect the
1 M resistor between this pin and CNTRL1 (Pin 17), so this pin is low in the sleep mode.
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VCC2
VCC2 is the positive supply voltage pin for the receiver RF section. This pin must be bypassed with an RF capacitor, which
may be shared with VCC1. VCC2 must also be bypassed with a 1 to 10 µF tantalum or electrolytic capacitor.
CNTRL1 and CNTRL0 select the receiver modes. CNTRL1 and CNTRL0 both high place the unit in the receive mode.
CNTRL1 and CNTRL0 both low place the unit in the power-down (sleep) mode. CNTRL1 is a high-impedance input
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CNTRL1
(CMOS compatible). An input voltage of 0 to 300 mV is interpreted as a logic low. An input voltage of Vcc - 300 mV or
greater is interpreted as a logic high. An input voltage greater than Vcc + 200 mV should not be applied to this pin. A logic
high requires a maximum source current of 40 µA. Sleep mode requires a maximum sink current of 1 µA. This pin must be
held at a logic level; it cannot be left unconnected.
CNTRL0 is used with CNTRL1 to control the receiver modes. CNTRL0 is a high-impedance input (CMOS compatible). An
input voltage of 0 to 300 mV is interpreted as a logic low. An input voltage of Vcc - 300 mV or greater is interpreted as a
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CNTRL0 logic high. An input voltage greater than Vcc + 200 mV should not be applied to this pin. A logic high requires a maximum
source current of 40 µA. Sleep mode requires a maximum sink current of 1 µA. This pin must be held at a logic level; it can-
not be left unconnected.
19
GND3
GND3 is an IC ground pin. It should be connected to GND1 by a short, low inductance trace.
RFIO is the receiver RF input pin. This pin is connected directly to the SAW filter transducer. Antennas presenting an
impedance in the range of 35 to 72 ohms resistive can be satisfactorily matched to this pin with a series matching coil and
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RFIO
a shunt matching/ESD protection coil. Other antenna impedances can be matched using two or three components. For
some impedances, two inductors and a capacitor will be required. A DC path from RFIO to ground is required for ESD pro-
tection.
RF Monolithics, Inc. Phone: (972) 233-2903
Fax: (972) 387-8148
RFM Europe
Phone: 44 1963 251383
Fax: 44 1963 251510
©1999 by RF Monolithics, Inc. The stylized RFM logo are registered trademarks of RF Monolithics, Inc.
E-mail: info@rfm.com
http://www.rfm.com
RX6501-062905
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