PD65881GB-P02_15 Datasheet, PDF (9/12 Pages) Renesas Technology Corp – μPD71051-Compliant Serial Control Unit Gate Array

μ PD65881GB-P02
4. PACKAGE DRAWING
44-PIN PLASTIC QFP (10x10)
A
B
33
23
34
22
CD
44
1
F
G
P
12
11
J
H
IM
K
M
NS
L
S
NOTE
Each lead centerline is located within 0.16 mm of
its true position (T.P.) at maximum material condition.
5. RECOMMENDED SOLDERING CONDITIONS
detail of lead end
S
R
Q
ITEM
A
B
C
D
F
G
H
I
J
K
L
M
N
P
Q
R
S
MILLIMETERS
13.2±0.2
10.0±0.2
10.0±0.2
13.2±0.2
1.0
1.0
0.37^{+−00..0087}
0.16
0.8 (T.P.)
1.6±0.2
0.8±0.2
0.17^{+−00..0065}
0.10
2.7±0.1
0.125±0.075
3°+−^73°°
3.0 MAX.
S44GB-80-3BS-2
These products should be soldered and mounted under the following recommended conditions.
For soldering methods and conditions other than those recommended below, please contact an NEC
Electronicssales representative.
For technical information, see the following website.
Semiconductor Device Mount Manual (http://www.necel.com/pkg/en/mount/index.html)
Soldering Method
Soldering Conditons
Recommended
Condition Symbol
Infrared reflow
Package peak temperature: 260°C
Time: 60 seconds max. (at 220°C or higher)
Count: 3 times or less
Exposure limit: 7 days^Note (after that, prebake at 125°C for 20 to 72 hours)
IR60-207-3
Partial heating
Pin temperature: 350°C max.
−
Time: 3 seconds max. (per pin row)
Note After opening the dry pack, store it at 25°C or less and 65% RH or less for the allowable storage period.
Caution Do not use different soldering methods together (except for partial heating).
Data Sheet A18499EJ2V0DS
7