M16C6K9_15 Datasheet, PDF (87/294 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Description

M16C/6K9 Group
Timer A
(2) Event counter mode
In this mode, the timer counts an external signal or an internal timer’s overflow. Timers A0 and A1 can count
a single-phase external signal. Timers A2, A3, and A4 can count a single-phase and a two-phase external
signals. Table.FB-2 lists timer specifications and Fig. FB-8 shows the timer Ai mode register in event count
mode when counting a single-phase external signal.
Table.FB-3 lists timer specifications and Fig. FB-8 shows the timer Ai mode register in event count mode
when counting a two-phase external signals.
Table.FB-2 Timer specifications in event counter mode (when not processing two-phase pulse signal)
Item
Specification
Count source
• External signal input to TAiIN pin (effective edge can be selected by software)
• TB2 overflow, TAj overflow
Count operation
• Up count or down count can be selected by external signal or software
• When the timer overflows or underflows, it reloads the reload register con
tents and then continuing counting (Note)
Divide ratio
1/ (FFFF16 - n + 1) for up count
1/ (n + 1) for down count
n : Set value
Count start condition
Count start flag is set (= 1)
Count stop condition
Count start flag is reset (= 0)
Interrupt request generation timing The timer overflows or underflows
TAiIN pin function
Programmable I/O port or count source input
TAiOUT pin function
Programmable I/O port, pulse output, or up/down count select input
Read from timer
Count value can be read out by reading timer Ai register
Write to timer
• When counting stopped
When a value is written to timer Ai register, it is written to both reload register and counter
• When counting in progress
When a value is written to timer Ai register, it is written to only reload register
(Transferred to counter at next reload time)
Select function
• Free-run count function
Even when the timer overflows or underflows, the reload register content is not reloaded to it
• Pulse output function
Each time the timer overflows or underflows, the TAiOUT pin’s polarity is reversed
Note: This does not apply when the free-run function is selected.
Timer Ai mode register
b7 b6 b5 b4 b3 b2 b1 b0
0
01
Symbol
TAiMR(i = 0, 1)
Address
When reset
039616, 039716
0016
Bit symbol
TMOD0
TMOD1
MR0
Bit name
Function
Operation mode selection
bits
Pulse output function
selection bit
b1 b0
0 1 : Event counter mode (Note 1)
0 : Pulse is not output
(TAiOUT pin is a normal port pin)
1 : Pulse is output (Note 2)
(TAiOUT pin is a pulse output pin)
RR _WW
MR1
MR2
MR3
TCK0
TCK1
Count polarity
selection bit (Note 3)
0 : Counts external signal's falling edge
1 : Counts external signal's rising edge
Up/down switching factor 0 : Up/down flag's content
selection bit
1 : TAiOUT pin's input signal (Note 4)
0 (Must always be fixed to “0” in event counter mode)
Count operation type
selection bit
0 : Reload type
1 : Free-run type
Invalid in event counter mode
Can be “0” or “1”
Note 1: In event counter mode, the count source is selected by the event / trigger select bit
(addresses 038216 and 038316).
Note 2: The settings of the corresponding port register and port direction register are invalid.
Note 3: Valid only when counting an external signal.
Note 4: When an “L” signal is input to the TAiOUT pin, the downcount is activated. When “H”,
the upcount is activated. Set the corresponding port direction register to “0”.
Fig.FB-8 Timer Ai mode register in event counter mode
Rev.1.00 Jun 06, 2003 page 85 of 290