M16C6K9_15 Datasheet, PDF (33/294 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Description

M16C/6K9 Group
Clock Generating Circuit
Clock Control
Fig.WA-3 shows the block diagram of the clock generating circuit.
XCIN
CM04
XCOUT
CM10 “1”
Write signal
RESET
Software reset
NMI
Interrupt request
level judgment
output
WAIT instruction
SQ
R
SQ
R
Sub clock
XIN
XOUT
Main clock
CM05
CM02
1/32 ^fC32
fC
f1
fAD
f8
f32
f1SIO2
f8SIO2
f32SIO2
bc
a _Divider d
CM07=0
fC
CM07=1
BCLK
CM0i : Bit i at address 000616
CM1i : Bit i at address 000716
WDCi : Bit i at address 000F16
b
a
1/2
1/2
1/2
1/2
c
1/2
CM06=1
CM06=0
CM17,CM16=10
CM06=0
CM17,CM16=11
d
CM06=0
CM17,CM16=01
CM06=0
CM17,CM16=00
Details of divider
Fig.WA-3 Clock generating circuit
Rev.1.00 Jun 06, 2003 page 31 of 290