M16C6K9_15 Datasheet, PDF (78/294 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Description

M16C/6K9 Group
DMAC
(1) 8-bit transfers
16-bit transfers from even address and the source address is even.
BCLK
Address
bus
CPU use
Source Destination ^Dummy
cycle
CPU use
RD signal
WR signal
Data
bus
CPU use
Source Destination ^Dummy
cycle
CPU use
(2) One wait is inserted into the source read under the conditions in (1)
BCLK
Address
bus
RD signal
CPU use
Source
Destination ^Dummy
cycle
WR signal
Data
bus
CPU use
Source
Destination ^Dummy
cycle
CPU use
CPU use
Note: The same thing changes occur with the respective conditions at the destination as at the source.
Fig.EC-5 Example of the transfer cycles for a source read
Rev.1.00 Jun 06, 2003 page 76 of 290