S3A6 Datasheet, PDF (81/129 Pages) Renesas Technology Corp – Synergy Microcontrollers

S3A6 Group MCUs
2. Electrical Characteristics
SSLn0
input
RSPCKn
CPOL = 0
input
RSPCKn
CPOL = 1
input
MISOn
output
MOSIn
input
n = A or B
t_LEAD
t_TD
t_LAG
t_SA
t_OH
t_OD
LSB OUT
(Last data)
MSB OUT
t_SU
t_H
MSB IN
DATA
t_Dr, t_Df
DATA
t_REL
LSB OUT
LSB IN
Figure 2.58 SPI timing (slave, CPHA = 1)
2.3.10 IIC Timing
MSB OUT
MSB IN
Table 2.37 IIC timing (1 of 2)
Conditions: VCC = 2.7 to 5.5 V
Parameter
IIC
(standard mode,
SMBus)
SCL input cycle time
SCL input high pulse width
SCL input low pulse width
SCL, SDA input rise time
SCL, SDA input fall time
SCL, SDA input spike pulse removal
time
SDA input bus free time
(When wakeup function is disabled)
SDA input bus free time
(When wakeup function is enabled)
START condition input hold time
(When wakeup function is disabled)
START condition input hold time
(When wakeup function is enabled)
Repeated START condition input setup
time
STOP condition input setup time
Data input setup time
Data input hold time
SCL, SDA capacitive load
Symbol
t_SCL
t_SCLH
t_SCLL
t_Sr
t_Sf
t_SP
t_BUF
t_BUF
t_STAH
t_STAH
t_STAS
t_STOS
t_SDAS
t_SDAH
C_b
Min*¹
6 (12) × t_IICcyc +
1300
3 (6) × t_IICcyc +
300
3 (6) × t_IICcyc +
300
-
-
0
Max
-
-
-
1000
300
1 (4) × t_IICcyc
3 (6) × t_IICcyc + -
300
3 (6) × t_IICcyc + -
4 × t_Pcyc
+ 300
t_IICcyc + 300
-
1 (5) × t_IICcyc + -
t_Pcyc +
300
1000
-
1000
-
t_IICcyc + 50
-
0
-
-
400
Test
Unit conditions
ns Figure 2.59
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
R01DS0308EU0100 Rev.1.00
Apr 4, 2017
Page 81 of 129