S3A6 Datasheet, PDF (117/129 Pages) Renesas Technology Corp – Synergy Microcontrollers

S3A6 Group MCUs
2.17.1 Serial Wire Debug (SWD)
2. Electrical Characteristics
Table 2.78 SWD characteristics (1)
Conditions: VCC = 2.4 to 5.5 V
Parameter
Symbol
Min
Typ
SWCLK clock cycle time
t_SWCKcyc
80
-
SWCLK clock high pulse width
t_SWCKH
35
-
SWCLK clock low pulse width
t_SWCKL
35
-
SWCLK clock rise time
t_SWCKr
-
-
SWCLK clock fall time
t_SWCKf
-
-
SWDIO setup time
t_SWDS
16
-
SWDIO hold time
t_SWDH
16
-
SWDIO data delay time
t_SWDD
2
-
Table 2.79 SWD characteristics (2)
Conditions: VCC = 1.6 to 2.4 V
Parameter
Symbol
Min
Typ
SWCLK clock cycle time
t_SWCKcyc
250
-
SWCLK clock high pulse width
t_SWCKH
120
-
SWCLK clock low pulse width
t_SWCKL
120
-
SWCLK clock rise time
t_SWCKr
-
-
SWCLK clock fall time
t_SWCKf
-
-
SWDIO setup time
t_SWDS
50
-
SWDIO hold time
t_SWDH
50
-
SWDIO data delay time
t_SWDD
2
-
Max
Unit
-
ns
-
ns
-
ns
5
ns
5
ns
-
ns
-
ns
70
ns
Max
Unit
-
ns
-
ns
-
ns
5
ns
5
ns
-
ns
-
ns
150
ns
Test conditions
Figure 2.86
Figure 2.87
Test conditions
Figure 2.86
Figure 2.87
SWCLK
Figure 2.86 SWD SWCLK timing
t_SWCKcyc
t_SWCKH
t_SWCKf
t_SWCKL
t_SWCKr
R01DS0308EU0100 Rev.1.00
Apr 4, 2017
Page 117 of 129