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S3A6 Datasheet, PDF (114/129 Pages) Renesas Technology Corp – Synergy Microcontrollers
S3A6 Group MCUs
2. Electrical Characteristics
Table 2.74 Data flash characteristics (3)
Middle-speed operating mode
Conditions: VCC = 1.8 to 5.5 V, Ta = –40 to +85°C
Parameter
Programming time
1-byte
Erasure time
1-KB
Blank check time
1-byte
1-KB
Suspended time during erasing
Data flash STOP recovery time
Symbol Min
tDP1
-
tDE1K
-
tDBC1
-
tDBC1K
-
tDSED
-
tDSTOP
720
FCLK = 4 MHz
Typ
Max
94.7
886
9.59
299
-
56.2
-
2.17
-
23.0
-
-
FCLK = 8 MHz
Min
Typ
Max
-
89.3
849
-
8.29
273
-
-
52.5
-
-
1.51
-
-
21.7
720
-
-
Unit
μs
ms
μs
ms
μs
ns
Note:
Note:
Note:
Does not include the time until each operation of the flash memory is started after instructions are executed by software.
The lower-limit frequency of FCLK is 1 MHz during programming or erasing the flash memory. When using FCLK at below
4 MHz, the frequency can be set to 1 MHz, 2 MHz, or 3 MHz. A non-integer frequency such as 1.5 MHz cannot be set.
The frequency accuracy of FCLK must be ±3.5%. Confirm the frequency accuracy of the clock source.
2.16 Boundary Scan
Table 2.75 Boundary scan
Conditions: VCC = AVCC0 = 2.4 to 5.5 V
Parameter
Symbol
Min
Typ
TCK clock cycle time
tTCKcyc
100
-
TCK clock high pulse width
tTCKH
45
-
TCK clock low pulse width
tTCKL
45
-
TCK clock rise time
tTCKr
-
-
TCK clock fall time
tTCKf
-
-
TMS setup time
tTMSS
20
-
TMS hold time
tTMSH
20
-
TDI setup time
tTDIS
20
-
TDI hold time
tTDIH
20
-
TDO data delay
tTDOD
-
-
Boundary Scan circuit start up time*1 tBSSTUP
tRESWP
-
Max
-
-
-
5
5
-
-
-
-
70
-
Note 1. Boundary scan does not function until power-on-reset becomes negative.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
-
Test conditions
Figure 2.81
Figure 2.82
Figure 2.83
TCK
tTCKH
tTCKcyc
tTCKf
tTCKL
tTCKr
Figure 2.81 Boundary scan TCK timing
R01DS0308EU0100 Rev.1.00
Apr 4, 2017
Page 114 of 129