HD64F3694FP Datasheet, PDF (80/452 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 3 Exception Handling
Relative Module Exception Sources
Vector
Number
Vector Address Priority
CPU
External interrupt
pin
Direct transition by executing 13
the SLEEP instruction
IRQ0
14
Low-voltage detection
interrupt*
H'001A to H'001B High
H'001C to H'001D
IRQ1
15
H'001E to H'001F
IRQ2
16
H'0020 to H'0021
IRQ3
17
H'0022 to H'0023
WKP
18
H'0024 to H'0025
Timer A
Overflow
19
H’0026 to H’0027

Reserved for system use
20
H’0028 to H’0029
Timer W
Timer W input capture A
21
/compare match A
Timer W input capture B
/compare match B
Timer W input capture C
/compare match C
Timer W input capture D
/compare match D
Timer W overflow
H’002A to H’002B
Timer V
Timer V compare match A
22
Timer V compare match B
Timer V overflow
H'002C to H'002D
SCI3
SCI3 receive data full
23
SCI3 transmit data empty
SCI3 transmit end
SCI3 receive error
H'002E to H'002F
IIC2
Transmit data empty
24
H'0030 to H'0031
Transmit end
Receive data full
Arbitration lost/Overrun error
NACK detection
Stop conditions detected
A/D converter
A/D conversion end
25
H'0032 to H'0033 Low
Note * A low-voltage detection interrupt is enabled only in the product with an on-chip power-
on reset and low-voltage detection circuit.
Rev.5.00 Nov. 02, 2005 Page 50 of 418
REJ09B0028-0500