HD64F3694FP Datasheet, PDF (441/452 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Main Revisions and Additions in this Edition
Item
Page Revision (See Manual for Details)
Preface
vi, vii Notes:
When using the on-chip emulator (E7, E8) for H8/3694 program
development and debugging, the following restrictions must be
noted.
1. The NMI pin is reserved for the E7 or E8, and cannot be
used.
3. Area H'7000 to H'7FFF is used by the E7 or E8, and is not
available to the user.
5. When the E7 or E8 is used, address breaks can be set as
either available to the user or for use by the E7 or E8. If
address breaks are set as being used by the E7 or E8, the
address break control registers must not be accessed.
6. When the E7 or E8 is used, NMI is an input/output pin
(open-drain in output mode), P85 and P87 are input pins,
and P86 is an output pin.
Note has been deleted.
Section 1 Overview
4, 5
Figure 1.1 Internal Block
Diagram of H8/3694
Group of F-ZTAT^TM
and Mask-ROM Versions,
Figure 1.2 Internal Block
Diagram of H8/3694N
(EEPROM Stacked
Version)
Timer V
IIC2
A/D
converter
POR/LVD
(optional)
Data bus (upper)
Address bus
PB0/AN0
PB1/AN1
PB2/AN2
PB3/AN3
PB4/AN4
PB5/AN5
PB6/AN6
PB7/AN7
AVCC
Rev.5.00 Nov. 02, 2005 Page 411 of 418
REJ09B0028-0500