R1LV0416D Datasheet, PDF (8/17 Pages) Renesas Technology Corp – 4M SRAM (256-kword × 16-bit)

R1LV0416D Series
Read Cycle
Parameter
Read cycle time
Address access time
Chip select access time
Output enable to output valid
Output hold from address change
LB#, UB# access time
Chip select to output in low-Z
LB#, UB# disable to low-Z
Output enable to output in low-Z
Chip deselect to output in high-Z
LB#, UB# disable to high-Z
Output disable to output in high-Z
Symbol
t
RC
t
AA
t
ACS1
t_ACS2
t_OE
t
OH
t
BA
t
CLZ1
t_CLZ2
t_BLZ
t
OLZ
t
CHZ1
t
CHZ2
t_BHZ
t_OHZ
R1LV0416D
-5SI
-7LI
Min
Max
Min
Max
55

70


55

70

55

70

55

70

35

40
10

10


55

70
10

10

10

10

5

5

5

5

0
20
0
25
0
20
0
25
0
20
0
25
0
20
0
25
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
2, 3
2, 3
2, 3
2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
Rev.1.00, May.24.2007, page 8 of 15