R1LV0416D Datasheet, PDF (3/17 Pages) Renesas Technology Corp – 4M SRAM (256-kword × 16-bit)

R1LV0416D Series
Pin Arrangement
A4
A3
A2
A1
A0
CS1#
I/O0
I/O1
I/O2
I/O3
V CC
V _SS
I/O4
I/O5
I/O6
I/O7
WE#
A17
A16
A15
A14
A13
44-pin TSOP
1
44
2
43
3
42
4
41
5
40
6
39
7
38
8
37
9
36
10
35
11
34
12
33
13
32
14
31
15
30
16
29
17
28
18
27
19
26
20
25
21
24
22
23
(Top view)
A5
A6
A7
OE#
UB#
LB#
I/O15
I/O14
I/O13
I/O12
V_SS
VCC
I/O11
I/O10
I/O9
I/O8
CS2
A8
A9
A10
A11
A12
Pin Description
Pin name
A0 to A17
I/O0 to I/O15
CS1# (CS1)
CS2
OE# (OE)
WE# (WE)
LB# (LB)
UB# (UB)
V
CC
V
SS
NC
Function
Address input
Data input/output
Chip select 1
Chip select 2
Output enable
Write enable
Lower byte select
Upper byte select
Power supply
Ground
No connection
48-ball CSP
1
2
3
4
5
6
A LB# OE# A0
A1
A2 CS2
B I/O8 UB# A3
A4 CS1# I/O0
C I/O9 I/O10 A5 A6 I/O1 I/O2
D VSS I/O11 A17 A7 I/O3 VCC
E VCC I/O12 NC A16 I/O4 VSS
F I/O14 I/O13 A14 A15 I/O5 I/O6
G I/O15 NC A12 A13 WE# I/O7
H NC
A8
A9 A10 A11 NC
(Top view)
Rev.1.00, May.24.2007, page 3 of 15