HD49335F Datasheet, PDF (8/30 Pages) Renesas Technology Corp – CDS/PGA AND 10-bit A/D TG Converter

HD49335F/HF
6. ADC Digital Output Control Function
The ADC digital output includes the functions output enable, code conversion, and test mode. Tables 3, 4 and 5
show the output functions and the codes.
Table 3 ADC Digital Output Functions
ADC Digital Output
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Operating Mode
H X X X X X Hi-Z
Low-power wait state
L L L L L L Same as in table 4.
Normal operation
L H L D9 is inverted in table 4.
H L L D8 to D0 are inverted in table 4.
H H L D9 to D0 are inverted in table 4.
X X H Output code is set up to Clamp Level.
Pre-blanking
H L L L Same as in table 5.
Normal operation
L H L D9 is inverted in table 5.
H L L D8 to D0 are inverted in table 5.
H H L D9 to D0 are inverted in table 5.
X X H Output code is set up to Clamp Level.
Pre-blanking
HXL LX
LHX
HLX
H L H L H L H L H L Test mode
L LHLHLHLHL
HH L H L H L H L H
HHX
LHLHLHLHLH
Note: 1. STBY, TEST, LINV, and MINV are set by register.
Table 4 ADC Output Code (Binary)
Output Pin
Output Steps
codes
3
4
5
6
511
512
1020
1021
1022
1023
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
L
L
L
L
L
L
L
L
H
H
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
H
L
H
L
L
L
L
L
L
L
H
H
L
L
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
L
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
Table 5 ADC Output Code (Gray)
Output Pin
Output Steps
codes
3
4
5
6
511
512
1020
1021
1022
1023
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
H
H
L
L
L
L
L
L
L
L
H
H
H
L
L
L
L
L
L
L
H
L
H
L
H
L
L
L
L
L
L
L
L
H
H
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
H
L
H
L
L
L
L
L
L
L
H
H
H
L
L
L
L
L
L
L
L
H
H
L
L
L
L
L
L
L
L
L
Rev.1.0, Feb.25.2004, page 8 of 29