H8S-2350 Datasheet, PDF (767/1025 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer

Appendix A Instruction Set
Appendix A Instruction Set
A.1 Instruction List
Operand Notation
Rd
Rs
Rn
ERn
MAC
(EAd)
General register (destination)^*1
General register (source)^*1
General register^*1
General register (32-bit register)
Multiply-and-accumulate register (32-bit register)^*2
Destination operand
(EAs)
EXR
Source operand
Extended control register
CCR
N
Condition-code register
N (negative) flag in CCR
Z
Z (zero) flag in CCR
V
V (overflow) flag in CCR
C
C (carry) flag in CCR
PC
Program counter
SP
#IMM
Stack pointer
Immediate data
disp
Displacement
+
Add
–
Subtract
×
Multiply
÷
Divide
∧
Logical AND
∨
Logical OR
⊕
Logical exclusive OR
→
Transfer from the operand on the left to the operand on the right, or
transition from the state on the left to the state on the right
¬
Logical NOT (logical complement)
( ) <>
Contents of operand
:8/:16/:24/:32
8-, 16-, 24-, or 32-bit length
Notes: 1. General registers include 8-bit registers (R0H to R7H, R0L to R7L), 16-bit registers (R0
to R7, E0 to E7), and 32-bit registers (ER0 to ER7).
2. The MAC register cannot be used in the H8S/2350 Group.
Rev. 3.00 Sep 15, 2006 page 733 of 988
REJ09B0330-0300