H8S-2350 Datasheet, PDF (234/1025 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer

Section 7 DMA Controller (DMAC)
7.1.5 Register Configuration
Table 7.3 summarizes the DMAC registers.
Table 7.3 DMAC Registers
Channel Name
Abbreviation R/W
0
Memory address register 0A MAR0A
R/W
I/O address register 0A
IOAR0A
R/W
Transfer count register 0A ETCR0A
R/W
Memory address register 0B MAR0B
R/W
I/O address register 0B
IOAR0B
R/W
Transfer count register 0B ETCR0B
R/W
1
Memory address register 1A MAR1A
R/W
I/O address register 1A
IOAR1A
R/W
Transfer count register 1A ETCR1A
R/W
Memory address register 1B MAR1B
R/W
I/O address register 1B
IOAR1B
R/W
Transfer count register 1B ETCR1B
R/W
0, 1
DMA write enable register DMAWER R/W
DMA terminal control register DMATCR
R/W
DMA control register 0A
DMACR0A R/W
DMA control register 0B
DMACR0B R/W
DMA control register 1A
DMACR1A R/W
DMA control register 1B
DMACR1B R/W
DMA band control register DMABCR
R/W
Module stop control register MSTPCR
R/W
Note: * Lower 16 bits of the address.
Initial
Value
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
H'00
H'00
H'00
H'00
H'00
H'00
H'0000
H'3FFF
Bus
Address^* Width
H'FEE0 16 bits
H'FEE4 16 bits
H'FEE6 16 bits
H'FEE8 16 bits
H'FEEC 16 bits
H'FEEE 16 bits
H'FEF0 16 bits
H'FEF4 16 bits
H'FEF6 16 bits
H'FEF8 16 bits
H'FEFC 16 bits
H'FEFE 16 bits
H'FF00 8 bits
H'FF01 8 bits
H'FF02 16 bits
H'FF03 16 bits
H'FF04 16 bits
H'FF05 16 bits
H'FF06 16 bits
H'FF3C 8 bits
Rev. 3.00 Sep 15, 2006 page 200 of 988
REJ09B0330-0300