HD74SSTV32852 Datasheet, PDF (7/9 Pages) Renesas Technology Corp – 24-bit to 48-bit Registered Buffer with SSTL_2 Inputs and Outputs

HD74SSTV32852
Waveforms – 3
Timing input
Output
V_CMR
t_PLH
V_TT
V_CMR
V_PP
t_PHL
V_TT
V _OH
V_OL
Waveforms – 4
Notes:
LVCMOS
RESET
Input
V_IH
V_CC /2
V_IL
t_PHL
Output
V_OH
V_TT
V_OL
1. I_CC tested with clock and data inputs held at V_CC or GND, and I_O = 0 mA.
2. All input pulses are supplied by generators having the following characteristics :
PRR ≤ 10 MHz, Zo = 50 Ω, input slew rate = 1 V/ns ±20% (unless otherwise specified).
3. The outputs are measured one at a time with one transition per measurement.
4. V_TT = V_REF = V_DDQ/2
5. V_IH = V_REF+310 mV (AC voltage levels) for differential inputs. V_IH = V_CC for LVCMOS input.
6. V_IL = V_REF–310 mV (AC voltage levels) for differential inputs. V_IL = GND for LVCMOS input.
7. t_PLH and t_PHL are the same as t_pd
Rev.4.00 Apr 07, 2006 page 7 of 8